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Tobias Diedrich7a952042017-12-03 10:09:28 +01001chip northbridge/intel/sandybridge
2 # IGD Displays
3 register "gfx.ndid" = "3"
4 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
5
6 # Enable DisplayPort 1 Hotplug with 6ms pulse
7 register "gpu_dp_d_hotplug" = "0x06"
8
9 # Enable DisplayPort 0 Hotplug with 6ms pulse
10 register "gpu_dp_c_hotplug" = "0x06"
11
12 # Enable DVI Hotplug with 6ms pulse
13 register "gpu_dp_b_hotplug" = "0x06"
14
15 device cpu_cluster 0x0 on
Tobias Diedrich7a952042017-12-03 10:09:28 +010016 chip cpu/intel/model_206ax
17 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010018 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010019 device lapic 0xacac off end
Tobias Diedrich7a952042017-12-03 10:09:28 +010020
21 register "c1_battery" = "1"
22 register "c2_battery" = "3"
23 register "c3_battery" = "5"
24
25 register "c1_acpower" = "1"
26 register "c2_acpower" = "3"
27 register "c3_acpower" = "5"
28 end
29 end
30 device domain 0x0 on
31 device pci 00.0 on end # Host bridge Host bridge
32 device pci 01.0 off end # PCIe Bridge for discrete graphics
33 device pci 02.0 on end # Internal graphics VGA controller
34 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
35 register "c2_latency" = "0x0065"
36 register "sata_port_map" = "0x1"
37 register "spi_lvscc" = "0x2005"
38 register "spi_uvscc" = "0x2005"
39
40 register "gen1_dec" = "0x00fc0a01" # SuperIO @0xa00-0xaff
41
42 device pci 16.0 on end # Management Engine Interface 1
43 device pci 16.1 off end # Management Engine Interface 2
44 device pci 16.2 off end # Management Engine IDE-R
45 device pci 16.3 off end # Management Engine KT
46 device pci 19.0 on end # Intel Gigabit Ethernet
47 device pci 1a.0 off end # USB2 EHCI #2
48 device pci 1b.0 on end # High Definition Audio Audio controller
49 device pci 1c.0 on end # PCIe Port #1 (unused)
50 device pci 1c.1 on end # PCIe Port #2 (full-length mPCIe/mSATA)
51 device pci 1c.2 on end # PCIe Port #3 (half-length mPCIe)
52 device pci 1c.3 off end # PCIe Port #4
53 device pci 1c.4 off end # PCIe Port #5
54 device pci 1c.5 off end # PCIe Port #6
55 device pci 1c.6 off end # PCIe Port #7
56 device pci 1c.7 off end # PCIe Port #8
57 device pci 1d.0 on end # USB2 EHCI #1
58 device pci 1e.0 off end # PCI bridge
59 device pci 1f.0 on # LPC bridge PCI-LPC bridge
60 chip superio/nuvoton/nct6776
61 device pnp 4e.0 off end # Floppy
62 device pnp 4e.1 off end # Parallel port
63 device pnp 4e.2 on # COM1
64 io 0x60 = 0x3f8
65 irq 0x70 = 4
66 end
67 device pnp 4e.3 off end # COM2, IR
68 device pnp 4e.5 off end # Keyboard
69 device pnp 4e.6 off end # CIR
70 device pnp 4e.7 on end # GPIO6
71 device pnp 4e.107 on end # GPIO7
72 device pnp 4e.207 off end # GPIO8
73 device pnp 4e.307 off end # GPIO9
74 device pnp 4e.8 off end # WDT
75 device pnp 4e.108 on end # GPIO0
76 device pnp 4e.208 off end # GPIOA
77 device pnp 4e.308 on # GPIOBASE
78 io 0x60 = 0xa80
79 end
80 device pnp 4e.109 off end # GPIO1
81 device pnp 4e.209 on end # GPIO2
82 device pnp 4e.309 off end # GPIO3
83 device pnp 4e.409 off end # GPIO4
84 device pnp 4e.509 off end # GPIO5
85 device pnp 4e.609 off end # GPIO6
86 device pnp 4e.709 off end # GPIO7
87 device pnp 4e.a on end # ACPI
88 device pnp 4e.b on # HWM, front pannel LED
89 io 0x60 = 0xa30
90 io 0x62 = 0 # unused
91 end
92 device pnp 4e.d off end # VID
93 device pnp 4e.e off end # CIR WAKE-UP
94 device pnp 4e.f off end # GPIO
95 device pnp 4e.14 off end # SVID
96 device pnp 4e.16 off end # Deep sleep
97 device pnp 4e.17 off end # GPIOA
98 end
99 end
100 device pci 1f.2 on end # SATA Controller 1
101 device pci 1f.3 on end # SMBus
102 device pci 1f.5 off end # SATA Controller 2
103 device pci 1f.6 off end # Thermal
104 end
105 end
106end