Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame^] | 2 | * This file is part of the coreboot project. |
Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2004 Tyan Computer |
| 5 | * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer. |
| 6 | * Copyright (C) 2006,2007 AMD |
| 7 | * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 22 | */ |
| 23 | |
| 24 | #if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE |
| 25 | #define SIS966_DEVN_BASE HT_CHAIN_END_UNITID_BASE |
| 26 | #else |
| 27 | #define SIS966_DEVN_BASE HT_CHAIN_UNITID_BASE |
| 28 | #endif |
| 29 | |
| 30 | #define EHCI_BAR_INDEX 0x10 |
| 31 | #define EHCI_BAR 0xFEF00000 |
| 32 | #define EHCI_DEBUG_OFFSET 0x98 |
| 33 | |
| 34 | static void set_debug_port(unsigned port) |
| 35 | { |
| 36 | uint32_t dword; |
| 37 | dword = pci_read_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74); |
| 38 | dword &= ~(0xf<<12); |
| 39 | dword |= (port<<12); |
| 40 | pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74, dword); |
| 41 | |
| 42 | } |
| 43 | |
| 44 | static void sis966_enable_usbdebug_direct(unsigned port) |
| 45 | { |
| 46 | set_debug_port(port); |
| 47 | pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); |
| 48 | pci_write_config8(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x04, 0x2); // mem space enabe |
| 49 | } |
| 50 | |