Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 2 | |
| 3 | #include <types.h> |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 4 | #include <console/console.h> |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 5 | #include <cpu/x86/smm.h> |
| 6 | #include <device/pci_def.h> |
Arthur Heymans | aade90e | 2018-01-25 00:33:45 +0100 | [diff] [blame] | 7 | #include <southbridge/intel/common/pmutil.h> |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 8 | #include "i82801ix.h" |
| 9 | |
Kyösti Mälkki | 661ad46 | 2020-12-29 06:26:21 +0200 | [diff] [blame] | 10 | #include <soc/nvs.h> |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 11 | |
Arthur Heymans | aade90e | 2018-01-25 00:33:45 +0100 | [diff] [blame] | 12 | void southbridge_smi_monitor(void) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 13 | { |
| 14 | #define IOTRAP(x) (trap_sts & (1 << x)) |
| 15 | u32 trap_sts, trap_cycle; |
| 16 | u32 data, mask = 0; |
| 17 | int i; |
| 18 | |
| 19 | trap_sts = RCBA32(0x1e00); // TRSR - Trap Status Register |
| 20 | RCBA32(0x1e00) = trap_sts; // Clear trap(s) in TRSR |
| 21 | |
| 22 | trap_cycle = RCBA32(0x1e10); |
| 23 | for (i=16; i<20; i++) { |
| 24 | if (trap_cycle & (1 << i)) |
| 25 | mask |= (0xff << ((i - 16) << 3)); |
| 26 | } |
| 27 | |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 28 | /* IOTRAP(3) SMI function call */ |
| 29 | if (IOTRAP(3)) { |
| 30 | if (gnvs && gnvs->smif) |
| 31 | io_trap_handler(gnvs->smif); // call function smif |
| 32 | return; |
| 33 | } |
| 34 | |
| 35 | /* IOTRAP(2) currently unused |
| 36 | * IOTRAP(1) currently unused */ |
| 37 | |
| 38 | /* IOTRAP(0) SMIC */ |
| 39 | if (IOTRAP(0)) { |
| 40 | if (!(trap_cycle & (1 << 24))) { // It's a write |
| 41 | printk(BIOS_DEBUG, "SMI1 command\n"); |
| 42 | data = RCBA32(0x1e18); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 43 | } |
| 44 | // Fall through to debug |
| 45 | } |
| 46 | |
| 47 | printk(BIOS_DEBUG, " trapped io address = 0x%x\n", trap_cycle & 0xfffc); |
Elyes HAOUAS | 70d79a4 | 2016-08-21 18:36:06 +0200 | [diff] [blame] | 48 | for (i=0; i < 4; i++) if (IOTRAP(i)) printk(BIOS_DEBUG, " TRAP = %d\n", i); |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 49 | printk(BIOS_DEBUG, " AHBE = %x\n", (trap_cycle >> 16) & 0xf); |
| 50 | printk(BIOS_DEBUG, " MASK = 0x%08x\n", mask); |
| 51 | printk(BIOS_DEBUG, " read/write: %s\n", (trap_cycle & (1 << 24)) ? "read" : "write"); |
| 52 | |
| 53 | if (!(trap_cycle & (1 << 24))) { |
| 54 | /* Write Cycle */ |
| 55 | data = RCBA32(0x1e18); |
| 56 | printk(BIOS_DEBUG, " iotrap written data = 0x%08x\n", data); |
| 57 | } |
| 58 | #undef IOTRAP |
| 59 | } |
| 60 | |
Arthur Heymans | aade90e | 2018-01-25 00:33:45 +0100 | [diff] [blame] | 61 | void southbridge_finalize_all(void) |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 62 | { |
Patrick Georgi | e72a8a3 | 2012-11-06 11:05:09 +0100 | [diff] [blame] | 63 | } |