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review.coreboot.org / coreboot / 7cba1c486beb9287dc563784904d2a8e0235340a / . / src / southbridge / intel / i82801gx / smbus.c
blob: d4980373d62d564b681a6efd079d86d174477c62 [file] [log] [blame]
Angel Pons182dbde2020-04-02 23:49:05 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Stefan Reinauerdebb11f2008-10-29 04:46:52 +0000[diff] [blame]2
Stefan Reinauera8e11682009-03-11 14:54:18 +0000[diff] [blame]3#include <device/device.h>
4#include <device/path.h>
5#include <device/smbus.h>
6#include <device/pci.h>
7#include <device/pci_ids.h>
Kyösti Mälkki1cae4542020-01-06 12:31:34 +0200[diff] [blame]8#include <device/smbus_host.h>
Angel Pons79b2a152020-12-05 20:43:00 +0100[diff] [blame]9#include <southbridge/intel/common/smbus_ops.h>
Stefan Reinauerdebb11f2008-10-29 04:46:52 +0000[diff] [blame]10#include "i82801gx.h"
Stefan Reinauer109ab312009-08-12 16:08:05 +0000[diff] [blame]11
Stefan Reinauerdebb11f2008-10-29 04:46:52 +0000[diff] [blame]12static struct device_operations smbus_ops = {
Sven Schnelle3c976792011-10-23 15:30:29 +0200[diff] [blame]13 .read_resources = smbus_read_resources,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +0000[diff] [blame]14 .set_resources = pci_dev_set_resources,
15 .enable_resources = pci_dev_enable_resources,
Kyösti Mälkkid0e212c2015-02-26 20:47:47 +0200[diff] [blame]16 .scan_bus = scan_smbus,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +0000[diff] [blame]17 .enable = i82801gx_enable,
18 .ops_smbus_bus = &lops_smbus_bus,
Angel Pons1fc0edd2020-05-31 00:03:28 +0200[diff] [blame]19 .ops_pci = &pci_dev_ops_pci,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +0000[diff] [blame]20};
21
22/* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
23static const struct pci_driver i82801gx_smbus __pci_driver = {
24 .ops = &smbus_ops,
Felix Singer43b7f412022-03-07 04:34:52 +0100[diff] [blame]25 .vendor = PCI_VID_INTEL,
Uwe Hermann5d7a1c82008-10-31 18:41:09 +0000[diff] [blame]26 .device = 0x27da,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +0000[diff] [blame]27};