blob: 0f12555a7f4b9007e8f0c6a50b35fbee3c921a3c [file] [log] [blame]
Patrick Georgiac959032020-05-05 22:49:26 +02001/* SPDX-License-Identifier: GPL-2.0-only */
T Michael Turney7a3e46d2019-03-21 14:21:26 -07002
3#include <arch/mmu.h>
4#include <soc/mmu.h>
5#include <soc/mmu_common.h>
Ravi Kumar Bokka64f7eaa2021-10-15 23:02:41 +05306#include <soc/symbols_common.h>
T Michael Turney7a3e46d2019-03-21 14:21:26 -07007
mkurumela9d225b2020-09-14 23:28:53 +05308__weak bool soc_modem_carve_out(void **start, void **end) { return false; }
T Michael Turney7a3e46d2019-03-21 14:21:26 -07009
10void qc_mmu_dram_config_post_dram_init(void *ddr_base, size_t ddr_size)
11{
mkurumela9d225b2020-09-14 23:28:53 +053012 void *start = NULL;
13 void *end = NULL;
14
15 if (!soc_modem_carve_out(&start, &end)) {
16 mmu_config_range((void *)ddr_base, ddr_size, CACHED_RAM);
17 } else {
18 mmu_config_range(ddr_base, start - ddr_base, CACHED_RAM);
19 mmu_config_range(end, ddr_base + ddr_size - end, CACHED_RAM);
20 }
Ravi Kumar Bokka64f7eaa2021-10-15 23:02:41 +053021
22 mmu_config_range((void *)_aop_code_ram, REGION_SIZE(aop_code_ram),
23 CACHED_RAM);
24 mmu_config_range((void *)_aop_data_ram, REGION_SIZE(aop_data_ram),
25 CACHED_RAM);
T Michael Turney7a3e46d2019-03-21 14:21:26 -070026}