Martin Roth | 9231f0b | 2022-10-28 22:39:23 -0600 | [diff] [blame] | 1 | ## SPDX-License-Identifier: GPL-2.0-only |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 2 | ifeq ($(CONFIG_SOC_INTEL_ELKHARTLAKE),y) |
| 3 | |
| 4 | subdirs-y += romstage |
| 5 | subdirs-y += ../../../cpu/intel/microcode |
| 6 | subdirs-y += ../../../cpu/intel/turbo |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 7 | |
| 8 | # all (bootblock, verstage, romstage, postcar, ramstage) |
| 9 | all-y += gspi.c |
| 10 | all-y += i2c.c |
| 11 | all-y += pmutil.c |
| 12 | all-y += spi.c |
| 13 | all-y += uart.c |
| 14 | |
| 15 | bootblock-y += bootblock/bootblock.c |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 16 | bootblock-y += bootblock/pch.c |
| 17 | bootblock-y += bootblock/report_platform.c |
| 18 | bootblock-y += espi.c |
| 19 | bootblock-y += gpio.c |
| 20 | bootblock-y += p2sb.c |
| 21 | |
| 22 | romstage-y += espi.c |
| 23 | romstage-y += gpio.c |
| 24 | romstage-y += meminit.c |
| 25 | romstage-y += reset.c |
| 26 | |
| 27 | ramstage-y += acpi.c |
| 28 | ramstage-y += chip.c |
| 29 | ramstage-y += cpu.c |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 30 | ramstage-y += espi.c |
| 31 | ramstage-y += finalize.c |
| 32 | ramstage-y += fsp_params.c |
| 33 | ramstage-y += gpio.c |
| 34 | ramstage-y += lockdown.c |
| 35 | ramstage-y += p2sb.c |
| 36 | ramstage-y += pmc.c |
| 37 | ramstage-y += reset.c |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 38 | ramstage-y += systemagent.c |
| 39 | ramstage-y += sd.c |
Mario Scheithauer | eda66c3 | 2022-04-26 13:50:52 +0200 | [diff] [blame] | 40 | ramstage-$(CONFIG_EHL_TSN_DRIVER) += tsn_gbe.c |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 41 | ramstage-y += me.c |
| 42 | |
| 43 | smm-y += gpio.c |
| 44 | smm-y += p2sb.c |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 45 | smm-y += pmutil.c |
| 46 | smm-y += smihandler.c |
| 47 | smm-y += uart.c |
| 48 | |
| 49 | verstage-y += gpio.c |
| 50 | |
| 51 | CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake |
| 52 | CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake/include |
| 53 | |
Arthur Heymans | ed8081c | 2021-12-11 14:23:31 +0100 | [diff] [blame] | 54 | # B0 stepping |
| 55 | cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-96-01 |
Lean Sheng Tan | 5cd7579 | 2021-06-09 13:58:12 -0700 | [diff] [blame] | 56 | cbfs-files-$(CONFIG_ADD_PSE_IMAGE_TO_CBFS) += pse.bin |
| 57 | pse.bin-file := $(CONFIG_PSE_IMAGE_FILE) |
| 58 | pse.bin-type := raw |
| 59 | pse.bin-compression := lzma |
| 60 | |
| 61 | # Add a build time check if the PSE file size fits |
| 62 | ifeq ($(CONFIG_ADD_PSE_IMAGE_TO_CBFS),y) |
| 63 | ifeq ($(call int-gt,\ |
| 64 | $(call file-size,$(CONFIG_PSE_IMAGE_FILE))\ |
| 65 | $(shell printf "%d" $(call int-shift-left, $(CONFIG_PSE_FW_FILE_SIZE_KIB) 10))), 1) |
| 66 | $(error PSE binary larger than CONFIG_PSE_FW_FILE_SIZE_KIB.) |
| 67 | endif |
| 68 | endif # CONFIG_ADD_PSE_IMAGE_TO_CBFS |
Arthur Heymans | ed8081c | 2021-12-11 14:23:31 +0100 | [diff] [blame] | 69 | |
Tan, Lean Sheng | 05dfe31 | 2020-08-25 20:40:17 -0700 | [diff] [blame] | 70 | endif |