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Felix Held187f59a2020-12-08 02:25:05 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <amdblocks/acpimmio.h>
Felix Heldba35f352022-10-18 20:43:00 +02004#include <amdblocks/aoac.h>
Felix Held187f59a2020-12-08 02:25:05 +01005#include <amdblocks/espi.h>
Karthikeyan Ramasubramanian0dbea482021-03-08 23:23:50 -07006#include <amdblocks/i2c.h>
Felix Held187f59a2020-12-08 02:25:05 +01007#include <amdblocks/lpc.h>
Felix Heldbbb8c042021-04-13 19:36:53 +02008#include <amdblocks/pmlib.h>
Felix Held187f59a2020-12-08 02:25:05 +01009#include <amdblocks/smbus.h>
10#include <amdblocks/spi.h>
Felix Held8ebdbbc2022-10-18 20:52:42 +020011#include <amdblocks/uart.h>
Felix Held187f59a2020-12-08 02:25:05 +010012#include <soc/i2c.h>
13#include <soc/southbridge.h>
14#include <soc/uart.h>
15#include <types.h>
16
Karthikeyan Ramasubramanian0dbea482021-03-08 23:23:50 -070017#include "chip.h"
18
Felix Held187f59a2020-12-08 02:25:05 +010019static void lpc_configure_decodes(void)
20{
21 if (CONFIG(POST_IO) && (CONFIG_POST_IO_PORT == 0x80))
22 lpc_enable_port80();
23}
24
25/* Before console init */
26void fch_pre_init(void)
27{
Felix Held425e73d2021-09-20 16:31:33 +020028 /* Enable_acpimmio_decode_pm04 to enable the ACPIMMIO decode which is needed to access
29 the GPIO registers. */
30 enable_acpimmio_decode_pm04();
Karthikeyan Ramasubramanian2d17ea42021-10-05 13:57:30 -060031 /* Setup SPI base by calling lpc_early_init before setting up eSPI. */
Felix Held187f59a2020-12-08 02:25:05 +010032 lpc_early_init();
Felix Held4e379a22021-10-14 21:43:11 +020033
34 /* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI
35 interface hasn't already been set up in verstage on PSP */
36 if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
37 configure_espi_with_mb_hook();
Felix Held187f59a2020-12-08 02:25:05 +010038
39 if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
40 lpc_configure_decodes();
41
42 fch_spi_early_init();
Felix Held187f59a2020-12-08 02:25:05 +010043 fch_smbus_init();
44 fch_enable_cf9_io();
45 fch_enable_legacy_io();
46 enable_aoac_devices();
Felix Held187f59a2020-12-08 02:25:05 +010047
48 /*
49 * On reset Range_0 defaults to enabled. We want to start with a clean
50 * slate to not have things unexpectedly enabled.
51 */
52 clear_uart_legacy_config();
53
Felix Held0dfaf332020-12-09 16:25:18 +010054 if (CONFIG(AMD_SOC_CONSOLE_UART))
Felix Held187f59a2020-12-08 02:25:05 +010055 set_uart_config(CONFIG_UART_FOR_CONSOLE);
Felix Held27b295b2021-03-25 01:20:41 +010056
57 /* disable the keyboard reset function before mainboard GPIO setup */
58 if (CONFIG(DISABLE_KEYBOARD_RESET_PIN))
59 fch_disable_kb_rst();
Felix Held187f59a2020-12-08 02:25:05 +010060}
61
62/* After console init */
63void fch_early_init(void)
64{
Felix Held8db77d72021-08-30 18:20:34 +020065 reset_i2c_peripherals();
Felix Heldbbb8c042021-04-13 19:36:53 +020066 pm_set_power_failure_state();
Felix Held187f59a2020-12-08 02:25:05 +010067 fch_print_pmxc0_status();
68 i2c_soc_early_init();
Martin Rothfd078d82021-08-11 13:27:45 -060069 show_spi_speeds_and_modes();
Felix Held187f59a2020-12-08 02:25:05 +010070
71 if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
72 lpc_disable_spi_rom_sharing();
Felix Held187f59a2020-12-08 02:25:05 +010073}