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review.coreboot.org / coreboot / 7c54d2a760c278412c0b2002ddcb555413f96231 / . / src / soc / mediatek / mt8173 / mt6311.c
blob: 8390dfd4d044162f68928f1d4daabcb500ac47f4 [file] [log] [blame]
henryc.chen7c54d2a2016-03-02 15:49:52 +0800[diff] [blame^]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <console/console.h>
17#include <device/i2c.h>
18#include <soc/mt6311.h>
19
20enum {
21 MT6311_SLAVE_ADDR = 0x6B,
22};
23
24static u32 get_mt6311_chip_id(uint8_t i2c_num)
25{
26 unsigned char id[2] = {0};
27
28 i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_CID,
29 &id[0], 0xFF, 0);
30 i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_SWCID,
31 &id[1], 0xFF, 0);
32
33 return (u32)(id[0] << 8 | id[1]);
34}
35
36static void mt6311_hw_init(uint8_t i2c_num)
37{
38 int ret = 0;
39 unsigned char var[3] = {0};
40
41
42 /*
43 * Phase Shedding Trim Software Setting
44 * The phase 2 of MT6311 will enter PWM mode if the threshold is
45 * reached.
46 * The threshold is set according to EFUSE value.
47 */
48 ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
49 MT6311_EFUSE_DOUT_56_63, &var[0],
50 0x3, 1);
51 ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
52 MT6311_EFUSE_DOUT_56_63, &var[1],
53 0x1, 7);
54 ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
55 MT6311_EFUSE_DOUT_64_71, &var[2],
56 0x1, 0);
57
58 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
59 MT6311_VDVFS1_ANA_CON10,
60 var[0] | var[1] << 2 | var[2] << 3, 0xf, 0);
61
62 /* I2C_CONFIG; pushpull setting, Opendrain is '0' */
63 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_INT_CON,
64 0x1, 0x1, 2);
65 /* RG_WDTRSTB_EN; CC, initial WDRSTB setting. */
66 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_RST_CON,
67 0x1, 0x1, 5);
68 /* initial INT function */
69 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_GPIO_MODE,
70 0x1, 0x7, 3);
71 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_STRUP_CON5,
72 0, 1 << 2 | 1 << 1 | 1 << 0, 0);
73
74 /* Vo max is 1.15V */
75 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
76 MT6311_STRUP_ANA_CON1, 0x3, 0x3, 5);
77 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
78 MT6311_BUCK_ALL_CON23, 0x1, 0x1, 0);
79 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
80 MT6311_STRUP_ANA_CON2, 0x3, 0x3, 0);
81 /* Suspend HW control from SPM */
82 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
83 MT6311_TOP_CON, 0x1, 0x1, 0);
84 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
85 MT6311_VDVFS11_CON7, 0x1, 0x1, 0);
86 /* default VDVFS power on */
87 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
88 MT6311_VDVFS11_CON9, 0x1, 0x1, 0);
89 /* for DVFS slew rate rising=0.67us */
90 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
91 MT6311_VDVFS11_CON10, 0x1, 0x7f, 0);
92 /* for DVFS slew rate, falling 2.0us */
93 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
94 MT6311_VDVFS11_CON11, 0x5, 0x7f, 0);
95 /* default VDVFS11_VOSEL 1.0V, SW control */
96 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
97 MT6311_VDVFS11_CON12, 0x40, 0x7f, 0);
98 /* default VDVFS11_VOSEL_ON 1.0V, HW control */
99 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
100 MT6311_VDVFS11_CON13, 0x40, 0x7f, 0);
101 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
102 MT6311_VDVFS11_CON14, 0x40, 0x7f, 0);
103 /* for DVFS sof change, falling 50us */
104 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
105 MT6311_VDVFS11_CON19, 0x3, 0x3, 0);
106 /* for DVFS sof change, falling only */
107 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
108 MT6311_VDVFS11_CON19, 0x1, 0x3, 4);
109 /* OFF LDO */
110 ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
111 MT6311_LDO_CON3, 0, 0x1, 0);
112
113 if (ret)
114 printk(BIOS_ERR, "ERROR: %s failed\n", __func__);
115}
116
117void mt6311_probe(uint8_t i2c_num)
118{
119 u32 val = 0;
120
121 /* Check device ID is MT6311 */
122 val = get_mt6311_chip_id(i2c_num);
123 printk(BIOS_INFO, "%s: device ID = %#x\n", __func__, val);
124
125 if (val < MT6311_E1_CID_CODE) {
126 printk(BIOS_ERR, "ERROR: unknown MT6311 device_id\n");
127 return;
128 }
129
130 mt6311_hw_init(i2c_num);
131}