blob: a228229371cae0ece902a6ec086a54d3c85a7352 [file] [log] [blame]
Kyösti Mälkki7b73e8522022-11-08 04:43:41 +00001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <device/device.h>
4#include <cpu/cpu.h>
5#include <cpu/x86/mp.h>
6#include <cpu/x86/mtrr.h>
7#include <cpu/intel/microcode.h>
8#include <cpu/intel/common/common.h>
9#include <cpu/x86/cache.h>
10
11static void model_f2x_init(struct device *cpu)
12{
13 /* Turn on caching if we haven't already */
14 enable_cache();
15};
16
17static struct device_operations cpu_dev_ops = {
18 .init = model_f2x_init,
19};
20
21static const struct cpu_device_id cpu_table[] = {
22 { X86_VENDOR_INTEL, 0x0f22 },
23 { X86_VENDOR_INTEL, 0x0f24 },
24 { X86_VENDOR_INTEL, 0x0f25 },
25 { X86_VENDOR_INTEL, 0x0f26 },
26 { X86_VENDOR_INTEL, 0x0f27 },
27 { X86_VENDOR_INTEL, 0x0f29 },
28 { 0, 0 },
29};
30
31static const struct cpu_driver driver __cpu_driver = {
32 .ops = &cpu_dev_ops,
33 .id_table = cpu_table,
34};
35
36/* Parallel MP initialization support. */
37static void pre_mp_init(void)
38{
39 const void *patch = intel_microcode_find();
40 intel_microcode_load_unlocked(patch);
41
42 /* Setup MTRRs based on physical address size. */
43 x86_setup_mtrrs_with_detect();
44 x86_mtrr_check();
45}
46
47static int get_cpu_count(void)
48{
49 return CONFIG_MAX_CPUS;
50}
51
52static void get_microcode_info(const void **microcode, int *parallel)
53{
54 *microcode = intel_microcode_find();
55 *parallel = !intel_ht_supported();
56}
57
58static const struct mp_ops mp_ops = {
59 .pre_mp_init = pre_mp_init,
60 .get_cpu_count = get_cpu_count,
61 .get_microcode_info = get_microcode_info,
62};
63
64void mp_init_cpus(struct bus *cpu_bus)
65{
66 mp_init_with_smm(cpu_bus, &mp_ops);
67}