Angel Pons | 1ddb894 | 2020-04-04 18:51:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 2 | |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 3 | #include <device/mmio.h> |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 4 | #include <assert.h> |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <delay.h> |
Nico Huber | 0f2dd1e | 2017-08-01 14:02:40 +0200 | [diff] [blame] | 7 | #include <device/i2c_simple.h> |
Julius Werner | 80af442 | 2014-10-20 13:18:56 -0700 | [diff] [blame] | 8 | #include <soc/clk.h> |
| 9 | #include <soc/i2c.h> |
| 10 | #include <soc/periph.h> |
| 11 | #include <soc/pinmux.h> |
Julius Werner | 80af442 | 2014-10-20 13:18:56 -0700 | [diff] [blame] | 12 | #include <timer.h> |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 13 | |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 14 | #define I2C_TIMEOUT_US (1000 * USECS_PER_MSEC) |
| 15 | |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 16 | struct __packed i2c_regs |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 17 | { |
| 18 | uint8_t con; |
| 19 | uint8_t _1[3]; |
| 20 | uint8_t stat; |
| 21 | uint8_t _2[3]; |
| 22 | uint8_t add; |
| 23 | uint8_t _3[3]; |
| 24 | uint8_t ds; |
| 25 | uint8_t _4[3]; |
| 26 | uint8_t lc; |
| 27 | uint8_t _5[3]; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 28 | }; |
| 29 | |
Stefan Reinauer | 6a00113 | 2017-07-13 02:20:27 +0200 | [diff] [blame] | 30 | struct __packed hsi2c_regs |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 31 | { |
| 32 | uint32_t usi_ctl; |
| 33 | uint32_t usi_fifo_ctl; |
| 34 | uint32_t usi_trailing_ctl; |
| 35 | uint32_t usi_clk_ctl; |
| 36 | uint32_t usi_clk_slot; |
| 37 | uint32_t spi_ctl; |
| 38 | uint32_t uart_ctl; |
| 39 | uint32_t res1; |
| 40 | uint32_t usi_int_en; |
| 41 | uint32_t usi_int_stat; |
| 42 | uint32_t modem_stat; |
| 43 | uint32_t error_stat; |
| 44 | uint32_t usi_fifo_stat; |
| 45 | uint32_t usi_txdata; |
| 46 | uint32_t usi_rxdata; |
| 47 | uint32_t res2; |
| 48 | uint32_t i2c_conf; |
| 49 | uint32_t i2c_auto_conf; |
| 50 | uint32_t i2c_timeout; |
| 51 | uint32_t i2c_manual_cmd; |
| 52 | uint32_t i2c_trans_status; |
| 53 | uint32_t i2c_timing_hs1; |
| 54 | uint32_t i2c_timing_hs2; |
| 55 | uint32_t i2c_timing_hs3; |
| 56 | uint32_t i2c_timing_fs1; |
| 57 | uint32_t i2c_timing_fs2; |
| 58 | uint32_t i2c_timing_fs3; |
| 59 | uint32_t i2c_timing_sla; |
| 60 | uint32_t i2c_addr; |
| 61 | }; |
| 62 | check_member(hsi2c_regs, i2c_addr, 0x70); |
| 63 | |
| 64 | struct i2c_bus |
| 65 | { |
| 66 | int bus_num; |
| 67 | struct i2c_regs *regs; |
| 68 | enum periph_id periph_id; |
| 69 | struct hsi2c_regs *hsregs; |
| 70 | int is_highspeed; /* High speed type, rather than I2C */ |
| 71 | int id; |
Martin Roth | 57e8909 | 2019-10-23 21:45:23 -0600 | [diff] [blame] | 72 | unsigned int clk_cycle; |
| 73 | unsigned int clk_div; |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 74 | }; |
| 75 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 76 | static struct i2c_bus i2c_busses[] = { |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 77 | { |
| 78 | .bus_num = 0, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 79 | .regs = (void *)0x12c60000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 80 | .periph_id = PERIPH_ID_I2C0, |
| 81 | }, |
| 82 | { |
| 83 | .bus_num = 1, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 84 | .regs = (void *)0x12c70000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 85 | .periph_id = PERIPH_ID_I2C1, |
| 86 | }, |
| 87 | { |
| 88 | .bus_num = 2, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 89 | .regs = (void *)0x12c80000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 90 | .periph_id = PERIPH_ID_I2C2, |
| 91 | }, |
| 92 | { |
| 93 | .bus_num = 3, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 94 | .regs = (void *)0x12c90000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 95 | .periph_id = PERIPH_ID_I2C3, |
| 96 | }, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 97 | /* I2C4-I2C10 are part of the USI block */ |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 98 | { |
| 99 | .bus_num = 4, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 100 | .hsregs = (void *)0x12ca0000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 101 | .periph_id = PERIPH_ID_I2C4, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 102 | .is_highspeed = 1, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 103 | }, |
| 104 | { |
| 105 | .bus_num = 5, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 106 | .hsregs = (void *)0x12cb0000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 107 | .periph_id = PERIPH_ID_I2C5, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 108 | .is_highspeed = 1, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 109 | }, |
| 110 | { |
| 111 | .bus_num = 6, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 112 | .hsregs = (void *)0x12cc0000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 113 | .periph_id = PERIPH_ID_I2C6, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 114 | .is_highspeed = 1, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 115 | }, |
| 116 | { |
| 117 | .bus_num = 7, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 118 | .hsregs = (void *)0x12cd0000, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 119 | .periph_id = PERIPH_ID_I2C7, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 120 | .is_highspeed = 1, |
| 121 | }, |
| 122 | { |
| 123 | .bus_num = 8, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 124 | .hsregs = (void *)0x12e00000, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 125 | .periph_id = PERIPH_ID_I2C8, |
| 126 | .is_highspeed = 1, |
| 127 | }, |
| 128 | { |
| 129 | .bus_num = 9, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 130 | .hsregs = (void *)0x12e10000, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 131 | .periph_id = PERIPH_ID_I2C9, |
| 132 | .is_highspeed = 1, |
| 133 | }, |
| 134 | { |
| 135 | .bus_num = 10, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 136 | .hsregs = (void *)0x12e20000, |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 137 | .periph_id = PERIPH_ID_I2C10, |
| 138 | .is_highspeed = 1, |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 139 | }, |
| 140 | }; |
| 141 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 142 | // I2C_CTL |
| 143 | enum { |
| 144 | Hsi2cFuncModeI2c = 1 << 0, |
| 145 | Hsi2cMaster = 1 << 3, |
| 146 | Hsi2cRxchon = 1 << 6, |
| 147 | Hsi2cTxchon = 1 << 7, |
| 148 | Hsi2cSwRst = 1 << 31 |
| 149 | }; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 150 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 151 | // I2C_FIFO_STAT |
| 152 | enum { |
| 153 | Hsi2cTxFifoLevel = 0x7f << 0, |
| 154 | Hsi2cTxFifoFull = 1 << 7, |
| 155 | Hsi2cTxFifoEmpty = 1 << 8, |
| 156 | Hsi2cRxFifoLevel = 0x7f << 16, |
| 157 | Hsi2cRxFifoFull = 1 << 23, |
| 158 | Hsi2cRxFifoEmpty = 1 << 24 |
| 159 | }; |
| 160 | |
| 161 | // I2C_FIFO_CTL |
| 162 | enum { |
| 163 | Hsi2cRxfifoEn = 1 << 0, |
| 164 | Hsi2cTxfifoEn = 1 << 1, |
| 165 | Hsi2cTxfifoTriggerLevel = 0x20 << 16, |
| 166 | Hsi2cRxfifoTriggerLevel = 0x20 << 4 |
| 167 | }; |
| 168 | |
| 169 | // I2C_TRAILING_CTL |
| 170 | enum { |
| 171 | Hsi2cTrailingCount = 0xff |
| 172 | }; |
| 173 | |
| 174 | // I2C_INT_EN |
| 175 | enum { |
| 176 | Hsi2cIntTxAlmostemptyEn = 1 << 0, |
| 177 | Hsi2cIntRxAlmostfullEn = 1 << 1, |
| 178 | Hsi2cIntTrailingEn = 1 << 6, |
| 179 | Hsi2cIntI2cEn = 1 << 9 |
| 180 | }; |
| 181 | |
| 182 | // I2C_CONF |
| 183 | enum { |
| 184 | Hsi2cAutoMode = 1 << 31, |
| 185 | Hsi2c10bitAddrMode = 1 << 30, |
| 186 | Hsi2cHsMode = 1 << 29 |
| 187 | }; |
| 188 | |
| 189 | // I2C_AUTO_CONF |
| 190 | enum { |
| 191 | Hsi2cReadWrite = 1 << 16, |
| 192 | Hsi2cStopAfterTrans = 1 << 17, |
| 193 | Hsi2cMasterRun = 1 << 31 |
| 194 | }; |
| 195 | |
| 196 | // I2C_TIMEOUT |
| 197 | enum { |
| 198 | Hsi2cTimeoutEn = 1 << 31 |
| 199 | }; |
| 200 | |
| 201 | // I2C_TRANS_STATUS |
| 202 | enum { |
| 203 | Hsi2cMasterBusy = 1 << 17, |
| 204 | Hsi2cSlaveBusy = 1 << 16, |
| 205 | Hsi2cTimeoutAuto = 1 << 4, |
| 206 | Hsi2cNoDev = 1 << 3, |
| 207 | Hsi2cNoDevAck = 1 << 2, |
| 208 | Hsi2cTransAbort = 1 << 1, |
| 209 | Hsi2cTransDone = 1 << 0 |
| 210 | }; |
| 211 | |
| 212 | #define HSI2C_SLV_ADDR_MAS(x) ((x & 0x3ff) << 10) |
| 213 | |
| 214 | enum { |
| 215 | Hsi2cTimeout = 100 |
| 216 | }; |
| 217 | |
| 218 | enum { |
| 219 | I2cConIntPending = 0x1 << 4, |
| 220 | I2cConIntEn = 0x1 << 5, |
| 221 | I2cConAckGen = 0x1 << 7 |
| 222 | }; |
| 223 | |
| 224 | enum { |
| 225 | I2cStatAck = 0x1 << 0, |
| 226 | I2cStatAddrZero = 0x1 << 1, |
| 227 | I2cStatAddrSlave = 0x1 << 2, |
| 228 | I2cStatArb = 0x1 << 3, |
| 229 | I2cStatEnable = 0x1 << 4, |
| 230 | I2cStatStartStop = 0x1 << 5, |
| 231 | I2cStatBusy = 0x1 << 5, |
| 232 | |
| 233 | I2cStatModeMask = 0x3 << 6, |
| 234 | I2cStatSlaveRecv = 0x0 << 6, |
| 235 | I2cStatSlaveXmit = 0x1 << 6, |
| 236 | I2cStatMasterRecv = 0x2 << 6, |
| 237 | I2cStatMasterXmit = 0x3 << 6 |
| 238 | }; |
| 239 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 240 | static int hsi2c_get_clk_details(struct i2c_bus *i2c, int *div, int *cycle, |
Martin Roth | 57e8909 | 2019-10-23 21:45:23 -0600 | [diff] [blame] | 241 | unsigned int op_clk) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 242 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 243 | struct hsi2c_regs *regs = i2c->hsregs; |
| 244 | unsigned long clkin = clock_get_periph_rate(i2c->periph_id); |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 245 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 246 | /* |
| 247 | * FPCLK / FI2C = |
| 248 | * (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 8 + 2 * FLT_CYCLE |
| 249 | * temp0 = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) |
| 250 | * temp1 = (TSCLK_L + TSCLK_H + 2) |
| 251 | */ |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 252 | uint32_t flt_cycle = (read32(®s->i2c_conf) >> 16) & 0x7; |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 253 | int temp = (clkin / op_clk) - 8 - 2 * flt_cycle; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 254 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 255 | // CLK_DIV max is 256. |
| 256 | int i; |
| 257 | for (i = 0; i < 256; i++) { |
| 258 | int period = temp / (i + 1) - 2; |
| 259 | if (period < 512 && period >= 2) { |
| 260 | *cycle = period; |
| 261 | *div = i; |
| 262 | return 0; |
| 263 | } |
| 264 | } |
| 265 | printk(BIOS_ERR, "%s: Failed to find timing parameters.\n", __func__); |
| 266 | return -1; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 267 | } |
| 268 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 269 | static void hsi2c_ch_init(struct i2c_bus *i2c, unsigned int frequency) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 270 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 271 | struct hsi2c_regs *regs = i2c->hsregs; |
| 272 | |
| 273 | int div, cycle; |
| 274 | if (hsi2c_get_clk_details(i2c, &div, &cycle, frequency)) |
| 275 | return; |
| 276 | |
| 277 | uint32_t sr_release; |
| 278 | sr_release = cycle; |
| 279 | |
| 280 | uint32_t scl_l, scl_h, start_su, start_hd, stop_su; |
| 281 | scl_l = scl_h = start_su = start_hd = stop_su = cycle / 2; |
| 282 | |
| 283 | uint32_t data_su, data_hd; |
| 284 | data_su = data_hd = cycle / 4; |
| 285 | |
| 286 | uint32_t timing_fs1 = start_su << 24 | start_hd << 16 | stop_su << 8; |
| 287 | uint32_t timing_fs2 = data_su << 24 | scl_l << 8 | scl_h << 0; |
| 288 | uint32_t timing_fs3 = div << 16 | sr_release << 0; |
| 289 | uint32_t timing_sla = data_hd << 0; |
| 290 | |
| 291 | // Currently operating in fast speed mode. |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 292 | write32(®s->i2c_timing_fs1, timing_fs1); |
| 293 | write32(®s->i2c_timing_fs2, timing_fs2); |
| 294 | write32(®s->i2c_timing_fs3, timing_fs3); |
| 295 | write32(®s->i2c_timing_sla, timing_sla); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 296 | |
| 297 | // Clear to enable timeout. |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 298 | write32(®s->i2c_timeout, |
| 299 | read32(®s->i2c_timeout) & ~Hsi2cTimeoutEn); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 300 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 301 | write32(®s->usi_trailing_ctl, Hsi2cTrailingCount); |
| 302 | write32(®s->usi_fifo_ctl, Hsi2cRxfifoEn | Hsi2cTxfifoEn); |
| 303 | write32(®s->i2c_conf, read32(®s->i2c_conf) | Hsi2cAutoMode); |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 304 | } |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 305 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 306 | static void hsi2c_reset(struct i2c_bus *i2c) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 307 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 308 | struct hsi2c_regs *regs = i2c->hsregs; |
| 309 | |
| 310 | // Set and clear the bit for reset. |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 311 | write32(®s->usi_ctl, read32(®s->usi_ctl) | Hsi2cSwRst); |
| 312 | write32(®s->usi_ctl, read32(®s->usi_ctl) & ~Hsi2cSwRst); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 313 | |
| 314 | /* FIXME: This just assumes 100KHz as a default bus freq */ |
| 315 | hsi2c_ch_init(i2c, 100000); |
| 316 | } |
| 317 | |
| 318 | static void i2c_ch_init(struct i2c_bus *i2c, int speed) |
| 319 | { |
| 320 | struct i2c_regs *regs = i2c->regs; |
| 321 | |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 322 | unsigned long freq, pres = 16, div; |
| 323 | unsigned long val; |
| 324 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 325 | freq = clock_get_periph_rate(i2c->periph_id); |
| 326 | // Calculate prescaler and divisor values. |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 327 | if ((freq / pres / (16 + 1)) > speed) |
| 328 | /* set prescaler to 512 */ |
| 329 | pres = 512; |
| 330 | |
| 331 | div = 0; |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 332 | |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 333 | while ((freq / pres / (div + 1)) > speed) |
| 334 | div++; |
| 335 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 336 | // Set prescaler, divisor according to freq, also set ACKGEN, IRQ. |
| 337 | val = (div & 0x0f) | 0xa0 | ((pres == 512) ? 0x40 : 0); |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 338 | write32(®s->con, val); |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 339 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 340 | // Init to SLAVE RECEIVE mode and clear I2CADDn. |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 341 | write32(®s->stat, 0); |
| 342 | write32(®s->add, 0); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 343 | // program Master Transmit (and implicit STOP). |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 344 | write32(®s->stat, I2cStatMasterXmit | I2cStatEnable); |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 345 | } |
| 346 | |
Martin Roth | 57e8909 | 2019-10-23 21:45:23 -0600 | [diff] [blame] | 347 | void i2c_init(unsigned int bus, int speed, int slaveadd) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 348 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 349 | struct i2c_bus *i2c = &i2c_busses[bus]; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 350 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 351 | if (i2c->is_highspeed) { |
| 352 | hsi2c_reset(i2c); |
David Hendricks | be58278 | 2013-06-22 19:40:43 -0700 | [diff] [blame] | 353 | hsi2c_ch_init(i2c, speed); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 354 | } else { |
| 355 | i2c_ch_init(i2c, speed); |
| 356 | } |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 357 | } |
| 358 | |
| 359 | /* |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 360 | * Check whether the transfer is complete. |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 361 | * Return values: |
| 362 | * 0 - transfer not done |
| 363 | * 1 - transfer finished successfully |
| 364 | * -1 - transfer failed |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 365 | */ |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 366 | static int hsi2c_check_transfer(struct hsi2c_regs *regs) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 367 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 368 | uint32_t status = read32(®s->i2c_trans_status); |
| 369 | if (status & (Hsi2cTransAbort | Hsi2cNoDevAck | |
| 370 | Hsi2cNoDev | Hsi2cTimeoutAuto)) { |
| 371 | if (status & Hsi2cTransAbort) |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 372 | printk(BIOS_ERR, |
| 373 | "%s: Transaction aborted.\n", __func__); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 374 | if (status & Hsi2cNoDevAck) |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 375 | printk(BIOS_ERR, |
| 376 | "%s: No ack from device.\n", __func__); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 377 | if (status & Hsi2cNoDev) |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 378 | printk(BIOS_ERR, |
| 379 | "%s: No response from device.\n", __func__); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 380 | if (status & Hsi2cTimeoutAuto) |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 381 | printk(BIOS_ERR, |
| 382 | "%s: Transaction time out.\n", __func__); |
| 383 | return -1; |
| 384 | } |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 385 | return !(status & Hsi2cMasterBusy); |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 386 | } |
| 387 | |
| 388 | /* |
| 389 | * Wait for the transfer to finish. |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 390 | * Return values: |
| 391 | * 0 - transfer not done |
| 392 | * 1 - transfer finished successfully |
| 393 | * -1 - transfer failed |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 394 | */ |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 395 | static int hsi2c_wait_for_transfer(struct hsi2c_regs *i2c) |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 396 | { |
Aaron Durbin | 4393346 | 2014-09-24 10:27:29 -0500 | [diff] [blame] | 397 | struct stopwatch sw; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 398 | |
Aaron Durbin | 4393346 | 2014-09-24 10:27:29 -0500 | [diff] [blame] | 399 | stopwatch_init_msecs_expire(&sw, Hsi2cTimeout); |
| 400 | while (!stopwatch_expired(&sw)) { |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 401 | int ret = hsi2c_check_transfer(i2c); |
| 402 | if (ret) |
| 403 | return ret; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 404 | } |
Gabe Black | f396ad5 | 2013-06-24 03:20:22 -0700 | [diff] [blame] | 405 | return 0; |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 406 | } |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 407 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 408 | static int hsi2c_senddata(struct hsi2c_regs *regs, const uint8_t *data, int len) |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 409 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 410 | while (!hsi2c_check_transfer(regs) && len) { |
| 411 | if (!(read32(®s->usi_fifo_stat) & Hsi2cTxFifoFull)) { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 412 | write32(®s->usi_txdata, *data++); |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 413 | len--; |
| 414 | } |
| 415 | } |
| 416 | return len ? -1 : 0; |
| 417 | } |
| 418 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 419 | static int hsi2c_recvdata(struct hsi2c_regs *regs, uint8_t *data, int len) |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 420 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 421 | while (!hsi2c_check_transfer(regs) && len) { |
| 422 | if (!(read32(®s->usi_fifo_stat) & Hsi2cRxFifoEmpty)) { |
| 423 | *data++ = read32(®s->usi_rxdata); |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 424 | len--; |
| 425 | } |
| 426 | } |
| 427 | return len ? -1 : 0; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 428 | } |
| 429 | |
Nico Huber | 029dfff | 2017-07-12 17:59:16 +0200 | [diff] [blame] | 430 | static int hsi2c_segment(struct i2c_msg *seg, struct hsi2c_regs *regs, |
| 431 | int stop) |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 432 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 433 | const uint32_t usi_ctl = Hsi2cFuncModeI2c | Hsi2cMaster; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 434 | |
Nico Huber | 029dfff | 2017-07-12 17:59:16 +0200 | [diff] [blame] | 435 | write32(®s->i2c_addr, HSI2C_SLV_ADDR_MAS(seg->slave)); |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 436 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 437 | /* |
| 438 | * We really only want to stop after this transaction (I think) if the |
| 439 | * "stop" parameter is true. I'm assuming that's supposed to make the |
| 440 | * controller issue a repeated start, but the documentation isn't very |
| 441 | * clear. We may need to switch to manual mode to really get the |
| 442 | * behavior we want. |
| 443 | */ |
| 444 | uint32_t autoconf = |
| 445 | seg->len | Hsi2cMasterRun | Hsi2cStopAfterTrans; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 446 | |
Nico Huber | 029dfff | 2017-07-12 17:59:16 +0200 | [diff] [blame] | 447 | if (seg->flags & I2C_M_RD) { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 448 | write32(®s->usi_ctl, usi_ctl | Hsi2cRxchon); |
| 449 | write32(®s->i2c_auto_conf, autoconf | Hsi2cReadWrite); |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 450 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 451 | if (hsi2c_recvdata(regs, seg->buf, seg->len)) |
| 452 | return -1; |
| 453 | } else { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 454 | write32(®s->usi_ctl, usi_ctl | Hsi2cTxchon); |
| 455 | write32(®s->i2c_auto_conf, autoconf); |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 456 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 457 | if (hsi2c_senddata(regs, seg->buf, seg->len)) |
| 458 | return -1; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 459 | } |
| 460 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 461 | if (hsi2c_wait_for_transfer(regs) != 1) |
| 462 | return -1; |
| 463 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 464 | write32(®s->usi_ctl, Hsi2cFuncModeI2c); |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 465 | return 0; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 466 | } |
| 467 | |
Nico Huber | 029dfff | 2017-07-12 17:59:16 +0200 | [diff] [blame] | 468 | static int hsi2c_transfer(struct i2c_bus *i2c, struct i2c_msg *segments, |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 469 | int count) |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 470 | { |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 471 | struct hsi2c_regs *regs = i2c->hsregs; |
| 472 | if (hsi2c_wait_for_transfer(regs) != 1) { |
| 473 | hsi2c_reset(i2c); |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 474 | return -1; |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 475 | } |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 476 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 477 | int i; |
| 478 | for (i = 0; i < count; i++) { |
| 479 | if (hsi2c_segment(&segments[i], regs, i == count - 1)) { |
| 480 | hsi2c_reset(i2c); |
Gabe Black | dda0e66 | 2013-11-06 11:21:48 -0800 | [diff] [blame] | 481 | return -1; |
| 482 | } |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 483 | } |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 484 | |
Gabe Black | becb3f6 | 2013-06-19 01:23:50 -0700 | [diff] [blame] | 485 | return 0; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 486 | } |
| 487 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 488 | static int i2c_int_pending(struct i2c_regs *regs) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 489 | { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 490 | return read8(®s->con) & I2cConIntPending; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 491 | } |
| 492 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 493 | static void i2c_clear_int(struct i2c_regs *regs) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 494 | { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 495 | write8(®s->con, read8(®s->con) & ~I2cConIntPending); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 496 | } |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 497 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 498 | static void i2c_ack_enable(struct i2c_regs *regs) |
| 499 | { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 500 | write8(®s->con, read8(®s->con) | I2cConAckGen); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 501 | } |
| 502 | |
| 503 | static void i2c_ack_disable(struct i2c_regs *regs) |
| 504 | { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 505 | write8(®s->con, read8(®s->con) & ~I2cConAckGen); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 506 | } |
| 507 | |
| 508 | static int i2c_got_ack(struct i2c_regs *regs) |
| 509 | { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 510 | return !(read8(®s->stat) & I2cStatAck); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 511 | } |
| 512 | |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 513 | static int i2c_wait_for_idle(struct i2c_regs *regs, int timeout_us) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 514 | { |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 515 | int timeout = timeout_us / 10; |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 516 | while (timeout--) { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 517 | if (!(read8(®s->stat) & I2cStatBusy)) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 518 | return 0; |
| 519 | udelay(10); |
| 520 | } |
| 521 | printk(BIOS_ERR, "I2C timeout waiting for idle.\n"); |
| 522 | return 1; |
| 523 | } |
| 524 | |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 525 | static int i2c_wait_for_int(struct i2c_regs *regs, int timeout_us) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 526 | { |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 527 | int timeout = timeout_us / 10; |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 528 | while (timeout--) { |
| 529 | if (i2c_int_pending(regs)) |
| 530 | return 0; |
| 531 | udelay(10); |
| 532 | } |
| 533 | printk(BIOS_ERR, "I2C timeout waiting for I2C interrupt.\n"); |
| 534 | return 1; |
| 535 | } |
| 536 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 537 | static int i2c_send_stop(struct i2c_regs *regs) |
| 538 | { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 539 | uint8_t mode = read8(®s->stat) & (I2cStatModeMask); |
| 540 | write8(®s->stat, mode | I2cStatEnable); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 541 | i2c_clear_int(regs); |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 542 | return i2c_wait_for_idle(regs, I2C_TIMEOUT_US); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 543 | } |
| 544 | |
| 545 | static int i2c_send_start(struct i2c_regs *regs, int read, int chip) |
| 546 | { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 547 | write8(®s->ds, chip << 1); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 548 | uint8_t mode = read ? I2cStatMasterRecv : I2cStatMasterXmit; |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 549 | write8(®s->stat, mode | I2cStatStartStop | I2cStatEnable); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 550 | i2c_clear_int(regs); |
| 551 | |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 552 | if (i2c_wait_for_int(regs, I2C_TIMEOUT_US)) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 553 | return 1; |
| 554 | |
| 555 | if (!i2c_got_ack(regs)) { |
| 556 | // Nobody home, but they may just be asleep. |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 557 | return 1; |
| 558 | } |
| 559 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 560 | return 0; |
| 561 | } |
| 562 | |
| 563 | static int i2c_xmit_buf(struct i2c_regs *regs, uint8_t *data, int len) |
| 564 | { |
| 565 | ASSERT(len); |
| 566 | |
| 567 | i2c_ack_enable(regs); |
| 568 | |
| 569 | int i; |
| 570 | for (i = 0; i < len; i++) { |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 571 | write8(®s->ds, data[i]); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 572 | |
| 573 | i2c_clear_int(regs); |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 574 | if (i2c_wait_for_int(regs, CONFIG_I2C_TRANSFER_TIMEOUT_US)) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 575 | return 1; |
| 576 | |
| 577 | if (!i2c_got_ack(regs)) { |
| 578 | printk(BIOS_INFO, "I2c nacked.\n"); |
| 579 | return 1; |
| 580 | } |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 581 | } |
| 582 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 583 | return 0; |
| 584 | } |
| 585 | |
| 586 | static int i2c_recv_buf(struct i2c_regs *regs, uint8_t *data, int len) |
| 587 | { |
| 588 | ASSERT(len); |
| 589 | |
| 590 | i2c_ack_enable(regs); |
| 591 | |
| 592 | int i; |
| 593 | for (i = 0; i < len; i++) { |
| 594 | if (i == len - 1) |
| 595 | i2c_ack_disable(regs); |
| 596 | |
| 597 | i2c_clear_int(regs); |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 598 | if (i2c_wait_for_int(regs, CONFIG_I2C_TRANSFER_TIMEOUT_US)) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 599 | return 1; |
| 600 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 601 | data[i] = read8(®s->ds); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 602 | } |
| 603 | |
| 604 | return 0; |
| 605 | } |
| 606 | |
Martin Roth | 57e8909 | 2019-10-23 21:45:23 -0600 | [diff] [blame] | 607 | int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments, int count) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 608 | { |
| 609 | struct i2c_bus *i2c = &i2c_busses[bus]; |
David Hendricks | 83fd239 | 2013-06-14 19:16:56 -0700 | [diff] [blame] | 610 | if (i2c->is_highspeed) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 611 | return hsi2c_transfer(i2c, segments, count); |
| 612 | |
| 613 | struct i2c_regs *regs = i2c->regs; |
| 614 | int res = 0; |
| 615 | |
Jes Klinke | 19baa9d | 2022-02-22 16:00:09 -0800 | [diff] [blame] | 616 | if (!regs || i2c_wait_for_idle(regs, I2C_TIMEOUT_US)) |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 617 | return 1; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 618 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 619 | write8(®s->stat, I2cStatMasterXmit | I2cStatEnable); |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 620 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 621 | int i; |
| 622 | for (i = 0; i < count; i++) { |
Nico Huber | 029dfff | 2017-07-12 17:59:16 +0200 | [diff] [blame] | 623 | struct i2c_msg *seg = &segments[i]; |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 624 | |
Nico Huber | 029dfff | 2017-07-12 17:59:16 +0200 | [diff] [blame] | 625 | res = i2c_send_start(regs, seg->flags & I2C_M_RD, seg->slave); |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 626 | if (res) |
| 627 | break; |
Nico Huber | 029dfff | 2017-07-12 17:59:16 +0200 | [diff] [blame] | 628 | if (seg->flags & I2C_M_RD) |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 629 | res = i2c_recv_buf(regs, seg->buf, seg->len); |
| 630 | else |
| 631 | res = i2c_xmit_buf(regs, seg->buf, seg->len); |
| 632 | if (res) |
| 633 | break; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 634 | } |
| 635 | |
Gabe Black | cdb61a6 | 2014-04-07 18:45:14 -0700 | [diff] [blame] | 636 | return i2c_send_stop(regs) || res; |
Gabe Black | 607c0b6 | 2013-05-16 05:45:57 -0700 | [diff] [blame] | 637 | } |