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Angel Ponsbbc99cf2020-04-04 18:51:23 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Shunqian Zheng015ae112016-04-20 20:35:09 +08002
Kyösti Mälkki13f66502019-03-03 08:01:05 +02003#include <device/mmio.h>
Lin Huang589474f2017-08-02 16:59:06 +08004#include <assert.h>
Shunqian Zheng015ae112016-04-20 20:35:09 +08005#include <gpio.h>
6#include <soc/gpio.h>
7#include <soc/grf.h>
8#include <soc/soc.h>
Elyes HAOUAS27d02d82019-05-15 21:11:39 +02009#include <types.h>
Shunqian Zheng015ae112016-04-20 20:35:09 +080010
Julius Werner2768a112016-09-01 22:55:58 -070011static void gpio_set_dir(gpio_t gpio, enum gpio_dir dir)
12{
Julius Werner55009af2019-12-02 22:03:27 -080013 clrsetbits32(&gpio_port[gpio.port]->swporta_ddr,
14 1 << gpio.num, dir << gpio.num);
Julius Werner2768a112016-09-01 22:55:58 -070015}
16
17static void gpio_set_pull(gpio_t gpio, enum gpio_pull pull)
Shunqian Zheng015ae112016-04-20 20:35:09 +080018{
Shunqian Zheng74bb4122016-05-17 14:00:04 +080019 u32 pull_val = gpio_get_pull_val(gpio, pull);
Julius Wernercd49cce2019-03-05 16:53:33 -080020 if (is_pmu_gpio(gpio) && CONFIG(SOC_ROCKCHIP_RK3288))
Julius Werner55009af2019-12-02 22:03:27 -080021 clrsetbits32(gpio_grf_reg(gpio), 3 << (gpio.idx * 2),
22 pull_val << (gpio.idx * 2));
Shunqian Zheng015ae112016-04-20 20:35:09 +080023 else
24 write32(gpio_grf_reg(gpio), RK_CLRSETBITS(3 << (gpio.idx * 2),
Shunqian Zheng74bb4122016-05-17 14:00:04 +080025 pull_val << (gpio.idx * 2)));
Shunqian Zheng015ae112016-04-20 20:35:09 +080026}
27
28void gpio_input(gpio_t gpio)
29{
Julius Werner2768a112016-09-01 22:55:58 -070030 gpio_set_pull(gpio, GPIO_PULLNONE);
31 gpio_set_dir(gpio, GPIO_INPUT);
Shunqian Zheng015ae112016-04-20 20:35:09 +080032}
33
34void gpio_input_pulldown(gpio_t gpio)
35{
Julius Werner2768a112016-09-01 22:55:58 -070036 gpio_set_pull(gpio, GPIO_PULLDOWN);
37 gpio_set_dir(gpio, GPIO_INPUT);
Shunqian Zheng015ae112016-04-20 20:35:09 +080038}
39
40void gpio_input_pullup(gpio_t gpio)
41{
Julius Werner2768a112016-09-01 22:55:58 -070042 gpio_set_pull(gpio, GPIO_PULLUP);
43 gpio_set_dir(gpio, GPIO_INPUT);
Shunqian Zheng015ae112016-04-20 20:35:09 +080044}
45
Lin Huang589474f2017-08-02 16:59:06 +080046void gpio_input_irq(gpio_t gpio, enum gpio_irq_type type, enum gpio_pull pull)
Jeffy Chenb0b59872017-03-03 18:24:02 +080047{
48 uint32_t int_polarity, inttype_level;
49 uint32_t mask = BIT(gpio.num);
50
Lin Huang589474f2017-08-02 16:59:06 +080051 /* gpio pull only PULLNONE, PULLUP, PULLDOWN status */
52 assert(pull <= GPIO_PULLDOWN);
53
54 gpio_set_dir(gpio, GPIO_INPUT);
55 gpio_set_pull(gpio, pull);
Jeffy Chenb0b59872017-03-03 18:24:02 +080056
57 int_polarity = inttype_level = 0;
58 switch (type) {
59 case IRQ_TYPE_EDGE_RISING:
60 int_polarity = mask;
61 inttype_level = mask;
62 break;
63 case IRQ_TYPE_EDGE_FALLING:
64 inttype_level = mask;
65 break;
66 case IRQ_TYPE_LEVEL_HIGH:
67 int_polarity = mask;
68 break;
69 case IRQ_TYPE_LEVEL_LOW:
70 break;
71 }
Julius Werner55009af2019-12-02 22:03:27 -080072 clrsetbits32(&gpio_port[gpio.port]->int_polarity,
73 mask, int_polarity);
74 clrsetbits32(&gpio_port[gpio.port]->inttype_level,
75 mask, inttype_level);
Jeffy Chenb0b59872017-03-03 18:24:02 +080076
Julius Werner55009af2019-12-02 22:03:27 -080077 setbits32(&gpio_port[gpio.port]->inten, mask);
78 clrbits32(&gpio_port[gpio.port]->intmask, mask);
Jeffy Chenb0b59872017-03-03 18:24:02 +080079}
80
81int gpio_irq_status(gpio_t gpio)
82{
83 uint32_t mask = BIT(gpio.num);
84 uint32_t int_status = read32(&gpio_port[gpio.port]->int_status);
85
86 if (!(int_status & mask))
87 return 0;
88
Julius Werner55009af2019-12-02 22:03:27 -080089 setbits32(&gpio_port[gpio.port]->porta_eoi, mask);
Jeffy Chenb0b59872017-03-03 18:24:02 +080090 return 1;
91}
92
Shunqian Zheng015ae112016-04-20 20:35:09 +080093int gpio_get(gpio_t gpio)
94{
95 return (read32(&gpio_port[gpio.port]->ext_porta) >> gpio.num) & 0x1;
96}
97
Julius Wernerffeee422018-03-27 16:22:00 -070098void gpio_set(gpio_t gpio, int value)
Shunqian Zheng015ae112016-04-20 20:35:09 +080099{
Julius Werner55009af2019-12-02 22:03:27 -0800100 clrsetbits32(&gpio_port[gpio.port]->swporta_dr, 1 << gpio.num,
101 !!value << gpio.num);
Julius Wernerffeee422018-03-27 16:22:00 -0700102}
103
104void gpio_output(gpio_t gpio, int value)
105{
106 gpio_set(gpio, value);
Julius Werner2768a112016-09-01 22:55:58 -0700107 gpio_set_dir(gpio, GPIO_OUTPUT);
108 gpio_set_pull(gpio, GPIO_PULLNONE);
Shunqian Zheng015ae112016-04-20 20:35:09 +0800109}