Angel Pons | e67ab18 | 2020-04-04 18:51:11 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 2 | |
Weiyi Lu | 7fd9327 | 2021-02-09 15:59:02 +0800 | [diff] [blame] | 3 | #include <delay.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 4 | #include <device/mmio.h> |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 5 | #include <soc/spm.h> |
| 6 | |
| 7 | enum { |
| 8 | SRAM_ISOINT_B = 1U << 6, |
| 9 | SRAM_CKISO = 1U << 5, |
| 10 | PWR_CLK_DIS = 1U << 4, |
| 11 | PWR_ON_2ND = 1U << 3, |
| 12 | PWR_ON = 1U << 2, |
| 13 | PWR_ISO = 1U << 1, |
| 14 | PWR_RST_B = 1U << 0 |
| 15 | }; |
| 16 | |
Bo-Chen Chen | f09872c | 2022-09-29 18:45:37 +0800 | [diff] [blame] | 17 | __weak void mtcmos_set_scpd_ext_buck_iso(const struct power_domain_data *pd) |
| 18 | { |
| 19 | /* do nothing */ |
| 20 | } |
| 21 | |
Mandy Liu | 55a1ba3 | 2022-10-11 13:40:07 +0800 | [diff] [blame] | 22 | void mtcmos_power_on(const struct power_domain_data *pd) |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 23 | { |
Tristan Shieh | 0423a2b | 2018-06-12 15:04:43 +0800 | [diff] [blame] | 24 | write32(&mtk_spm->poweron_config_set, |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 25 | (SPM_PROJECT_CODE << 16) | (1U << 0)); |
| 26 | |
Bo-Chen Chen | f09872c | 2022-09-29 18:45:37 +0800 | [diff] [blame] | 27 | if (pd->caps & SCPD_EXT_BUCK_ISO) |
| 28 | mtcmos_set_scpd_ext_buck_iso(pd); |
| 29 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 30 | setbits32(pd->pwr_con, PWR_ON); |
| 31 | setbits32(pd->pwr_con, PWR_ON_2ND); |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 32 | |
Tristan Shieh | 0423a2b | 2018-06-12 15:04:43 +0800 | [diff] [blame] | 33 | while (!(read32(&mtk_spm->pwr_status) & pd->pwr_sta_mask) || |
| 34 | !(read32(&mtk_spm->pwr_status_2nd) & pd->pwr_sta_mask)) |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 35 | continue; |
| 36 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 37 | clrbits32(pd->pwr_con, PWR_CLK_DIS); |
| 38 | clrbits32(pd->pwr_con, PWR_ISO); |
| 39 | setbits32(pd->pwr_con, PWR_RST_B); |
| 40 | clrbits32(pd->pwr_con, pd->sram_pdn_mask); |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 41 | |
Tristan Shieh | 0423a2b | 2018-06-12 15:04:43 +0800 | [diff] [blame] | 42 | while (read32(pd->pwr_con) & pd->sram_ack_mask) |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 43 | continue; |
Weiyi Lu | 16bc621 | 2021-02-09 17:59:26 +0800 | [diff] [blame] | 44 | |
| 45 | if (pd->caps & SCPD_SRAM_ISO) { |
| 46 | setbits32(pd->pwr_con, SRAM_ISOINT_B); |
| 47 | udelay(1); |
| 48 | clrbits32(pd->pwr_con, SRAM_CKISO); |
| 49 | } |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | void mtcmos_display_power_on(void) |
| 53 | { |
Weiyi Lu | 7fd9327 | 2021-02-09 15:59:02 +0800 | [diff] [blame] | 54 | int i; |
Tristan Shieh | 0423a2b | 2018-06-12 15:04:43 +0800 | [diff] [blame] | 55 | |
Weiyi Lu | 7fd9327 | 2021-02-09 15:59:02 +0800 | [diff] [blame] | 56 | for (i = 0; i < ARRAY_SIZE(disp); i++) |
| 57 | mtcmos_power_on(&disp[i]); |
Tristan Shieh | 0423a2b | 2018-06-12 15:04:43 +0800 | [diff] [blame] | 58 | } |
| 59 | |
| 60 | void mtcmos_audio_power_on(void) |
| 61 | { |
Weiyi Lu | 7fd9327 | 2021-02-09 15:59:02 +0800 | [diff] [blame] | 62 | int i; |
Tristan Shieh | 0423a2b | 2018-06-12 15:04:43 +0800 | [diff] [blame] | 63 | |
Weiyi Lu | 7fd9327 | 2021-02-09 15:59:02 +0800 | [diff] [blame] | 64 | for (i = 0; i < ARRAY_SIZE(audio); i++) |
| 65 | mtcmos_power_on(&audio[i]); |
CC Ma | 0c22084 | 2015-07-31 17:10:59 +0800 | [diff] [blame] | 66 | } |