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review.coreboot.org / coreboot / 799c3219146c8d246ef95f1fdb83dc7bc1f2be61 / . / src / soc / mediatek / common / lastbus.c
blob: cf4f8d1a425abb0671b9741f26eeb3ea533caf6b [file] [log] [blame]
ot_zhenguo.lie125bea2022-08-11 19:32:09 +0800[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <console/console.h>
4#include <device/mmio.h>
5#include <soc/addressmap.h>
6#include <soc/lastbus.h>
7
8static unsigned long preisys_dump_offset[] = {
9 0x500, /* PERIBUS_DBG0 */
10 0x504, /* PERIBUS_DBG1 */
11 0x508, /* PERIBUS_DBG2 */
12 0x50C, /* PERIBUS_DBG3 */
13 0x510, /* PERIBUS_DBG4 */
14 0x514, /* PERIBUS_DBG5 */
15 0x518, /* PERIBUS_DBG6 */
16 0x51C, /* PERIBUS_DBG7 */
17 0x520, /* PERIBUS_DBG8 */
18 0x524, /* PERIBUS_DBG9 */
19 0x528, /* PERIBUS_DBG10 */
20 0x52C, /* PERIBUS_DBG11 */
21 0x530, /* PERIBUS_DBG12 */
22 0x534, /* PERIBUS_DBG13 */
23 0x538, /* PERIBUS_DBG14 */
24 0x53C, /* PERIBUS_DBG15 */
25 0x580, /* PERIBUS_DBG16 */
26 0x584, /* PERIBUS_DBG17 */
27};
28
29static void lastbus_setup(void)
30{
31 /* peri lastbus init */
32 write32p(PERICFG_BASE + BUS_PERI_R0, PERISYS_TIMEOUT);
33 write32p(PERICFG_BASE + BUS_PERI_R1, PERISYS_ENABLE);
34
35 /* infra lastbus init */
36 write32p(INFRACFG_AO_BASE + BUS_INFRA_CTRL, INFRASYS_CONFIG);
37}
38
39static void lastbus_dump(void)
40{
41 unsigned int i;
42 uintptr_t reg;
43
44 if (read32p(INFRACFG_AO_BASE + BUS_INFRA_CTRL) & 0x1) {
45 printk(BIOS_DEBUG, "** Dump lastbus infra debug registers start **\n");
46 for (i = 0; i < INFRA_NUM; i++) {
47 reg = INFRACFG_AO_BASE + BUS_INFRA_SNAPSHOT + 4 * i;
48 printk(BIOS_DEBUG, "%08x\n", read32p(reg));
49 }
50 }
51
52 if (read32p(PERICFG_BASE + BUS_PERI_R1) & 0x1) {
53 printk(BIOS_DEBUG, "** Dump lastbus peri debug registers start **\n");
54 for (i = 0; i < PERI_NUM; i++) {
55 reg = PERICFG_BASE + preisys_dump_offset[i];
56 printk(BIOS_DEBUG, "%08x\n", read32p(reg));
57 }
58 }
59}
60
61void lastbus_init(void)
62{
63 lastbus_dump();
64 lastbus_setup();
65}