blob: df9876a84aba2fc4bc48cf61e1db96b31781f543 [file] [log] [blame]
Angel Pons8a3453f2020-04-02 23:48:19 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Michał Żygowski1b12b642019-11-24 16:32:05 +01002
3#include <bootblock_common.h>
4#include <halt.h>
Michał Żygowski1b12b642019-11-24 16:32:05 +01005#include <amdblocks/amd_pci_mmconf.h>
6#include <amdblocks/biosram.h>
Kyösti Mälkki520717d2019-12-15 21:37:48 +02007#include <arch/bootblock.h>
Michał Żygowski1b12b642019-11-24 16:32:05 +01008#include <cpu/amd/msr.h>
9#include <cpu/x86/mtrr.h>
Kyösti Mälkkifedaac82019-12-15 21:37:38 +020010#include <cpu/x86/lapic.h>
Michał Żygowski1b12b642019-11-24 16:32:05 +010011
12#define EARLY_VMTRR_FLASH 6
13
14static void set_early_mtrrs(void)
15{
16 /* Cache the ROM to speed up booting */
17 set_var_mtrr(EARLY_VMTRR_FLASH, OPTIMAL_CACHE_ROM_BASE,
18 OPTIMAL_CACHE_ROM_SIZE, MTRR_TYPE_WRPROT);
19}
20
Kyösti Mälkki520717d2019-12-15 21:37:48 +020021void bootblock_soc_early_init(void)
22{
23 bootblock_early_southbridge_init();
24}
25
Michał Żygowski1b12b642019-11-24 16:32:05 +010026asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
27{
28 enable_pci_mmconf();
29 set_early_mtrrs();
30
Kyösti Mälkkifedaac82019-12-15 21:37:38 +020031 if (CONFIG(UDELAY_LAPIC))
32 enable_lapic();
33
Michał Żygowski1b12b642019-11-24 16:32:05 +010034 bootblock_main_with_basetime(base_timestamp);
35}
36
37asmlinkage void ap_bootblock_c_entry(void)
38{
39 enable_pci_mmconf();
40 set_early_mtrrs();
41
Kyösti Mälkkifedaac82019-12-15 21:37:38 +020042 if (CONFIG(UDELAY_LAPIC))
43 enable_lapic();
44
Michał Żygowski1b12b642019-11-24 16:32:05 +010045 void (*ap_romstage_entry)(void) = get_ap_entry_ptr();
46 ap_romstage_entry(); /* execution does not return */
47 halt();
48}