Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Google Inc. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * 3. The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * lib_helpers.h: All library function prototypes and macros are defined in this |
| 30 | * file. |
| 31 | */ |
| 32 | |
| 33 | #ifndef __ARCH_LIB_HELPERS_H__ |
| 34 | #define __ARCH_LIB_HELPERS_H__ |
| 35 | |
Furquan Shaikh | 4c2cb16 | 2014-08-27 15:57:47 -0700 | [diff] [blame] | 36 | #ifdef __ASSEMBLY__ |
| 37 | |
| 38 | /* Macro to switch to label based on current el */ |
| 39 | .macro switch_el xreg label1 label2 label3 |
| 40 | mrs \xreg, CurrentEL |
| 41 | /* Currently at EL1 */ |
| 42 | cmp \xreg, 0x4 |
| 43 | b.eq \label1 |
| 44 | /* Currently at EL2 */ |
| 45 | cmp \xreg, 0x8 |
| 46 | b.eq \label2 |
| 47 | /* Currently at EL3 */ |
| 48 | cmp \xreg, 0xc |
| 49 | b.eq \label3 |
| 50 | .endm |
| 51 | |
| 52 | /* Macro to read sysreg at current EL |
| 53 | xreg - reg in which read value needs to be stored |
| 54 | sysreg - system reg that is to be read |
| 55 | */ |
| 56 | .macro read_current xreg sysreg |
| 57 | switch_el \xreg, 101f, 102f, 103f |
| 58 | 101: |
| 59 | mrs \xreg, \sysreg\()_el1 |
| 60 | b 104f |
| 61 | 102: |
| 62 | mrs \xreg, \sysreg\()_el2 |
| 63 | b 104f |
| 64 | 103: |
| 65 | mrs \xreg, \sysreg\()_el3 |
| 66 | b 104f |
| 67 | 104: |
| 68 | .endm |
| 69 | |
| 70 | /* Macro to write sysreg at current EL |
| 71 | xreg - reg from which value needs to be written |
| 72 | sysreg - system reg that is to be written |
| 73 | temp - temp reg that can be used to read current EL |
| 74 | */ |
| 75 | .macro write_current sysreg xreg temp |
| 76 | switch_el \temp, 101f, 102f, 103f |
| 77 | 101: |
| 78 | msr \sysreg\()_el1, \xreg |
| 79 | b 104f |
| 80 | 102: |
| 81 | msr \sysreg\()_el2, \xreg |
| 82 | b 104f |
| 83 | 103: |
| 84 | msr \sysreg\()_el3, \xreg |
| 85 | b 104f |
| 86 | 104: |
| 87 | .endm |
| 88 | |
| 89 | #else |
| 90 | |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 91 | #define EL0 0 |
| 92 | #define EL1 1 |
| 93 | #define EL2 2 |
| 94 | #define EL3 3 |
| 95 | |
| 96 | #define CURRENT_EL_MASK 0x3 |
| 97 | #define CURRENT_EL_SHIFT 2 |
| 98 | |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 99 | #include <stdint.h> |
| 100 | |
Elyes HAOUAS | 70083a1 | 2017-06-27 21:51:20 +0200 | [diff] [blame] | 101 | #define DAIF_DBG_BIT (1 << 3) |
| 102 | #define DAIF_ABT_BIT (1 << 2) |
| 103 | #define DAIF_IRQ_BIT (1 << 1) |
| 104 | #define DAIF_FIQ_BIT (1 << 0) |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 105 | |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 106 | #define SWITCH_CASE_READ(func, var, type, el) do { \ |
| 107 | type var = -1; \ |
| 108 | switch (el) { \ |
| 109 | case EL1: \ |
| 110 | var = func##_el1(); \ |
| 111 | break; \ |
| 112 | case EL2: \ |
| 113 | var = func##_el2(); \ |
| 114 | break; \ |
| 115 | case EL3: \ |
| 116 | var = func##_el3(); \ |
| 117 | break; \ |
| 118 | } \ |
| 119 | return var; \ |
| 120 | } while (0) |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 121 | |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 122 | #define SWITCH_CASE_WRITE(func, var, el) do { \ |
| 123 | switch (el) { \ |
| 124 | case EL1: \ |
| 125 | func##_el1(var); \ |
| 126 | break; \ |
| 127 | case EL2: \ |
| 128 | func##_el2(var); \ |
| 129 | break; \ |
| 130 | case EL3: \ |
| 131 | func##_el3(var); \ |
| 132 | break; \ |
| 133 | } \ |
| 134 | } while (0) |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 135 | |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 136 | #define SWITCH_CASE_TLBI(func, el) do { \ |
| 137 | switch (el) { \ |
| 138 | case EL1: \ |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 139 | func##_el1(); \ |
| 140 | break; \ |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 141 | case EL2: \ |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 142 | func##_el2(); \ |
| 143 | break; \ |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 144 | case EL3: \ |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 145 | func##_el3(); \ |
| 146 | break; \ |
| 147 | } \ |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 148 | } while (0) |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 149 | |
| 150 | /* PSTATE and special purpose register access functions */ |
| 151 | uint32_t raw_read_current_el(void); |
| 152 | uint32_t get_current_el(void); |
| 153 | uint32_t raw_read_daif(void); |
| 154 | void raw_write_daif(uint32_t daif); |
| 155 | void enable_debug_exceptions(void); |
| 156 | void enable_serror_exceptions(void); |
| 157 | void enable_irq(void); |
| 158 | void enable_fiq(void); |
| 159 | void disable_debug_exceptions(void); |
| 160 | void disable_serror_exceptions(void); |
| 161 | void disable_irq(void); |
| 162 | void disable_fiq(void); |
| 163 | uint64_t raw_read_dlr_el0(void); |
| 164 | void raw_write_dlr_el0(uint64_t dlr_el0); |
| 165 | uint64_t raw_read_dspsr_el0(void); |
| 166 | void raw_write_dspsr_el0(uint64_t dspsr_el0); |
| 167 | uint64_t raw_read_elr_el1(void); |
| 168 | void raw_write_elr_el1(uint64_t elr_el1); |
| 169 | uint64_t raw_read_elr_el2(void); |
| 170 | void raw_write_elr_el2(uint64_t elr_el2); |
| 171 | uint64_t raw_read_elr_el3(void); |
| 172 | void raw_write_elr_el3(uint64_t elr_el3); |
| 173 | uint64_t raw_read_elr_current(void); |
| 174 | void raw_write_elr_current(uint64_t elr); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 175 | uint64_t raw_read_elr(uint32_t el); |
| 176 | void raw_write_elr(uint64_t elr, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 177 | uint32_t raw_read_fpcr(void); |
| 178 | void raw_write_fpcr(uint32_t fpcr); |
| 179 | uint32_t raw_read_fpsr(void); |
| 180 | void raw_write_fpsr(uint32_t fpsr); |
| 181 | uint32_t raw_read_nzcv(void); |
| 182 | void raw_write_nzcv(uint32_t nzcv); |
| 183 | uint64_t raw_read_sp_el0(void); |
| 184 | void raw_write_sp_el0(uint64_t sp_el0); |
| 185 | uint64_t raw_read_sp_el1(void); |
| 186 | void raw_write_sp_el1(uint64_t sp_el1); |
| 187 | uint64_t raw_read_sp_el2(void); |
| 188 | void raw_write_sp_el2(uint64_t sp_el2); |
| 189 | uint32_t raw_read_spsel(void); |
| 190 | void raw_write_spsel(uint32_t spsel); |
| 191 | uint64_t raw_read_sp_el3(void); |
| 192 | void raw_write_sp_el3(uint64_t sp_el3); |
| 193 | uint32_t raw_read_spsr_abt(void); |
| 194 | void raw_write_spsr_abt(uint32_t spsr_abt); |
| 195 | uint32_t raw_read_spsr_el1(void); |
| 196 | void raw_write_spsr_el1(uint32_t spsr_el1); |
| 197 | uint32_t raw_read_spsr_el2(void); |
| 198 | void raw_write_spsr_el2(uint32_t spsr_el2); |
| 199 | uint32_t raw_read_spsr_el3(void); |
| 200 | void raw_write_spsr_el3(uint32_t spsr_el3); |
| 201 | uint32_t raw_read_spsr_current(void); |
| 202 | void raw_write_spsr_current(uint32_t spsr); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 203 | uint32_t raw_read_spsr(uint32_t el); |
| 204 | void raw_write_spsr(uint32_t spsr, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 205 | uint32_t raw_read_spsr_fiq(void); |
| 206 | void raw_write_spsr_fiq(uint32_t spsr_fiq); |
| 207 | uint32_t raw_read_spsr_irq(void); |
| 208 | void raw_write_spsr_irq(uint32_t spsr_irq); |
| 209 | uint32_t raw_read_spsr_und(void); |
| 210 | void raw_write_spsr_und(uint32_t spsr_und); |
| 211 | |
| 212 | /* System control register access */ |
| 213 | uint32_t raw_read_actlr_el1(void); |
| 214 | void raw_write_actlr_el1(uint32_t actlr_el1); |
| 215 | uint32_t raw_read_actlr_el2(void); |
| 216 | void raw_write_actlr_el2(uint32_t actlr_el2); |
| 217 | uint32_t raw_read_actlr_el3(void); |
| 218 | void raw_write_actlr_el3(uint32_t actlr_el3); |
| 219 | uint32_t raw_read_actlr_current(void); |
| 220 | void raw_write_actlr_current(uint32_t actlr); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 221 | uint32_t raw_read_actlr(uint32_t el); |
| 222 | void raw_write_actlr(uint32_t actlr, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 223 | uint32_t raw_read_afsr0_el1(void); |
| 224 | void raw_write_afsr0_el1(uint32_t afsr0_el1); |
| 225 | uint32_t raw_read_afsr0_el2(void); |
| 226 | void raw_write_afsr0_el2(uint32_t afsr0_el2); |
| 227 | uint32_t raw_read_afsr0_el3(void); |
| 228 | void raw_write_afsr0_el3(uint32_t afsr0_el3); |
| 229 | uint32_t raw_read_afsr0_current(void); |
| 230 | void raw_write_afsr0_current(uint32_t afsr0); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 231 | uint32_t raw_read_afsr0(uint32_t el); |
| 232 | void raw_write_afsr0(uint32_t afsr0, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 233 | uint32_t raw_read_afsr1_el1(void); |
| 234 | void raw_write_afsr1_el1(uint32_t afsr1_el1); |
| 235 | uint32_t raw_read_afsr1_el2(void); |
| 236 | void raw_write_afsr1_el2(uint32_t afsr1_el2); |
| 237 | uint32_t raw_read_afsr1_el3(void); |
| 238 | void raw_write_afsr1_el3(uint32_t afsr1_el3); |
| 239 | uint32_t raw_read_afsr1_current(void); |
| 240 | void raw_write_afsr1_current(uint32_t afsr1); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 241 | uint32_t raw_read_afsr1(uint32_t el); |
| 242 | void raw_write_afsr1(uint32_t afsr1, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 243 | uint32_t raw_read_aidr_el1(void); |
| 244 | uint64_t raw_read_amair_el1(void); |
| 245 | void raw_write_amair_el1(uint64_t amair_el1); |
| 246 | uint64_t raw_read_amair_el2(void); |
| 247 | void raw_write_amair_el2(uint64_t amair_el2); |
| 248 | uint64_t raw_read_amair_el3(void); |
| 249 | void raw_write_amair_el3(uint64_t amair_el3); |
| 250 | uint64_t raw_read_amair_current(void); |
| 251 | void raw_write_amair_current(uint64_t amair); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 252 | uint64_t raw_read_amair(uint32_t el); |
| 253 | void raw_write_amair(uint64_t amair, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 254 | uint32_t raw_read_ccsidr_el1(void); |
| 255 | uint32_t raw_read_clidr_el1(void); |
| 256 | uint32_t raw_read_cpacr_el1(void); |
| 257 | void raw_write_cpacr_el1(uint32_t cpacr_el1); |
| 258 | uint32_t raw_read_cptr_el2(void); |
| 259 | void raw_write_cptr_el2(uint32_t cptr_el2); |
| 260 | uint32_t raw_read_cptr_el3(void); |
| 261 | void raw_write_cptr_el3(uint32_t cptr_el3); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 262 | uint32_t raw_read_csselr_el1(void); |
| 263 | void raw_write_csselr_el1(uint32_t csselr_el1); |
| 264 | uint32_t raw_read_ctr_el0(void); |
| 265 | uint32_t raw_read_esr_el1(void); |
| 266 | void raw_write_esr_el1(uint32_t esr_el1); |
| 267 | uint32_t raw_read_esr_el2(void); |
| 268 | void raw_write_esr_el2(uint32_t esr_el2); |
| 269 | uint32_t raw_read_esr_el3(void); |
| 270 | void raw_write_esr_el3(uint32_t esr_el3); |
| 271 | uint32_t raw_read_esr_current(void); |
| 272 | void raw_write_esr_current(uint32_t esr); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 273 | uint32_t raw_read_esr(uint32_t el); |
| 274 | void raw_write_esr(uint32_t esr, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 275 | uint64_t raw_read_far_el1(void); |
| 276 | void raw_write_far_el1(uint64_t far_el1); |
| 277 | uint64_t raw_read_far_el2(void); |
| 278 | void raw_write_far_el2(uint64_t far_el2); |
| 279 | uint64_t raw_read_far_el3(void); |
| 280 | void raw_write_far_el3(uint64_t far_el3); |
| 281 | uint64_t raw_read_far_current(void); |
| 282 | void raw_write_far_current(uint64_t far); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 283 | uint64_t raw_read_far(uint32_t el); |
| 284 | void raw_write_far(uint64_t far, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 285 | uint64_t raw_read_hcr_el2(void); |
| 286 | void raw_write_hcr_el2(uint64_t hcr_el2); |
| 287 | uint64_t raw_read_aa64pfr0_el1(void); |
| 288 | uint64_t raw_read_mair_el1(void); |
| 289 | void raw_write_mair_el1(uint64_t mair_el1); |
| 290 | uint64_t raw_read_mair_el2(void); |
| 291 | void raw_write_mair_el2(uint64_t mair_el2); |
| 292 | uint64_t raw_read_mair_el3(void); |
| 293 | void raw_write_mair_el3(uint64_t mair_el3); |
| 294 | uint64_t raw_read_mair_current(void); |
| 295 | void raw_write_mair_current(uint64_t mair); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 296 | uint64_t raw_read_mair(uint32_t el); |
| 297 | void raw_write_mair(uint64_t mair, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 298 | uint64_t raw_read_mpidr_el1(void); |
| 299 | uint32_t raw_read_rmr_el1(void); |
| 300 | void raw_write_rmr_el1(uint32_t rmr_el1); |
| 301 | uint32_t raw_read_rmr_el2(void); |
| 302 | void raw_write_rmr_el2(uint32_t rmr_el2); |
| 303 | uint32_t raw_read_rmr_el3(void); |
| 304 | void raw_write_rmr_el3(uint32_t rmr_el3); |
| 305 | uint32_t raw_read_rmr_current(void); |
| 306 | void raw_write_rmr_current(uint32_t rmr); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 307 | uint32_t raw_read_rmr(uint32_t el); |
| 308 | void raw_write_rmr(uint32_t rmr, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 309 | uint64_t raw_read_rvbar_el1(void); |
| 310 | void raw_write_rvbar_el1(uint64_t rvbar_el1); |
| 311 | uint64_t raw_read_rvbar_el2(void); |
| 312 | void raw_write_rvbar_el2(uint64_t rvbar_el2); |
| 313 | uint64_t raw_read_rvbar_el3(void); |
| 314 | void raw_write_rvbar_el3(uint64_t rvbar_el3); |
| 315 | uint64_t raw_read_rvbar_current(void); |
| 316 | void raw_write_rvbar_current(uint64_t rvbar); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 317 | uint64_t raw_read_rvbar(uint32_t el); |
| 318 | void raw_write_rvbar(uint64_t rvbar, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 319 | uint32_t raw_read_scr_el3(void); |
| 320 | void raw_write_scr_el3(uint32_t scr_el3); |
| 321 | uint32_t raw_read_sctlr_el1(void); |
| 322 | void raw_write_sctlr_el1(uint32_t sctlr_el1); |
| 323 | uint32_t raw_read_sctlr_el2(void); |
| 324 | void raw_write_sctlr_el2(uint32_t sctlr_el2); |
| 325 | uint32_t raw_read_sctlr_el3(void); |
| 326 | void raw_write_sctlr_el3(uint32_t sctlr_el3); |
| 327 | uint32_t raw_read_sctlr_current(void); |
| 328 | void raw_write_sctlr_current(uint32_t sctlr); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 329 | uint32_t raw_read_sctlr(uint32_t el); |
| 330 | void raw_write_sctlr(uint32_t sctlr, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 331 | uint64_t raw_read_tcr_el1(void); |
| 332 | void raw_write_tcr_el1(uint64_t tcr_el1); |
| 333 | uint32_t raw_read_tcr_el2(void); |
| 334 | void raw_write_tcr_el2(uint32_t tcr_el2); |
| 335 | uint32_t raw_read_tcr_el3(void); |
| 336 | void raw_write_tcr_el3(uint32_t tcr_el3); |
Furquan Shaikh | c10e7f2 | 2014-09-04 15:03:48 -0700 | [diff] [blame] | 337 | uint64_t raw_read_tcr_current(void); |
| 338 | void raw_write_tcr_current(uint64_t tcr); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 339 | uint64_t raw_read_tcr(uint32_t el); |
| 340 | void raw_write_tcr(uint64_t tcr, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 341 | uint64_t raw_read_ttbr0_el1(void); |
| 342 | void raw_write_ttbr0_el1(uint64_t ttbr0_el1); |
| 343 | uint64_t raw_read_ttbr0_el2(void); |
| 344 | void raw_write_ttbr0_el2(uint64_t ttbr0_el2); |
| 345 | uint64_t raw_read_ttbr0_el3(void); |
| 346 | void raw_write_ttbr0_el3(uint64_t ttbr0_el3); |
| 347 | uint64_t raw_read_ttbr0_current(void); |
| 348 | void raw_write_ttbr0_current(uint64_t ttbr0); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 349 | uint64_t raw_read_ttbr0(uint32_t el); |
| 350 | void raw_write_ttbr0(uint64_t ttbr0, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 351 | uint64_t raw_read_ttbr1_el1(void); |
| 352 | void raw_write_ttbr1_el1(uint64_t ttbr1_el1); |
| 353 | uint64_t raw_read_vbar_el1(void); |
| 354 | void raw_write_vbar_el1(uint64_t vbar_el1); |
| 355 | uint64_t raw_read_vbar_el2(void); |
| 356 | void raw_write_vbar_el2(uint64_t vbar_el2); |
| 357 | uint64_t raw_read_vbar_el3(void); |
| 358 | void raw_write_vbar_el3(uint64_t vbar_el3); |
| 359 | uint64_t raw_read_vbar_current(void); |
| 360 | void raw_write_vbar_current(uint64_t vbar); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 361 | uint64_t raw_read_vbar(uint32_t el); |
| 362 | void raw_write_vbar(uint64_t vbar, uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 363 | |
| 364 | /* Cache maintenance system instructions */ |
| 365 | void dccisw(uint64_t cisw); |
| 366 | void dccivac(uint64_t civac); |
| 367 | void dccsw(uint64_t csw); |
| 368 | void dccvac(uint64_t cvac); |
| 369 | void dccvau(uint64_t cvau); |
| 370 | void dcisw(uint64_t isw); |
| 371 | void dcivac(uint64_t ivac); |
| 372 | void dczva(uint64_t zva); |
| 373 | void iciallu(void); |
| 374 | void icialluis(void); |
| 375 | void icivau(uint64_t ivau); |
| 376 | |
| 377 | /* TLB maintenance instructions */ |
| 378 | void tlbiall_el1(void); |
| 379 | void tlbiall_el2(void); |
| 380 | void tlbiall_el3(void); |
| 381 | void tlbiall_current(void); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 382 | void tlbiall(uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 383 | void tlbiallis_el1(void); |
| 384 | void tlbiallis_el2(void); |
| 385 | void tlbiallis_el3(void); |
| 386 | void tlbiallis_current(void); |
HC Yen | 11e743c | 2015-01-13 11:36:14 +0800 | [diff] [blame] | 387 | void tlbiallis(uint32_t el); |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 388 | void tlbivaa_el1(uint64_t va); |
| 389 | |
| 390 | /* Memory barrier */ |
| 391 | /* data memory barrier */ |
| 392 | #define dmb_opt(opt) asm volatile ("dmb " #opt : : : "memory") |
| 393 | /* data sync barrier */ |
| 394 | #define dsb_opt(opt) asm volatile ("dsb " #opt : : : "memory") |
| 395 | /* instruction sync barrier */ |
| 396 | #define isb_opt(opt) asm volatile ("isb " #opt : : : "memory") |
| 397 | |
| 398 | #define dmb() dmb_opt(sy) |
| 399 | #define dsb() dsb_opt(sy) |
| 400 | #define isb() isb_opt() |
| 401 | |
| 402 | /* Clock */ |
| 403 | void set_cntfrq(uint32_t freq); |
| 404 | |
Furquan Shaikh | 4c2cb16 | 2014-08-27 15:57:47 -0700 | [diff] [blame] | 405 | #endif // __ASSEMBLY__ |
| 406 | |
Furquan Shaikh | 635b45d | 2014-08-27 12:16:16 -0700 | [diff] [blame] | 407 | #endif //__ARCH_LIB_HELPERS_H__ |