blob: 2980f483d830d6a8a7f09e678f44bf0064b2578c [file] [log] [blame]
Asami Doif7952422019-06-11 16:01:31 +09001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2019 Asami Doi <d0iasm.pub@gmail.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8
9#include <cbmem.h>
10#include <ramdetect.h>
11#include <symbols.h>
12#include <device/device.h>
Patrick Rudolph792fd512020-01-23 14:10:07 +010013#include <bootmem.h>
14
15extern u8 _secram[], _esecram[];
16
17void bootmem_platform_add_ranges(void)
18{
19 bootmem_add_range((uintptr_t)_secram, REGION_SIZE(secram), BM_MEM_BL31);
20}
Asami Doif7952422019-06-11 16:01:31 +090021
22static void mainboard_enable(struct device *dev)
23{
24 int ram_size_mb = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB);
25 ram_resource(dev, 0, (uintptr_t)_dram / KiB, ram_size_mb * KiB);
26}
27
28struct chip_operations mainboard_ops = {
29 .name = "qemu_aarch64",
30 .enable_dev = mainboard_enable,
31};