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Kyösti Mälkki91162702011-11-03 15:22:01 +02001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Kyösti Mälkki <kyosti.malkki@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010017 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Kyösti Mälkki91162702011-11-03 15:22:01 +020018 */
19
20#include <stdint.h>
21#include <device/pci_def.h>
22#include <arch/io.h>
Kyösti Mälkki91162702011-11-03 15:22:01 +020023#include <arch/cpu.h>
24#include <stdlib.h>
Kyösti Mälkki91162702011-11-03 15:22:01 +020025#include <console/console.h>
Kyösti Mälkki3aff1a32012-04-11 12:19:03 +030026#include <cpu/x86/bist.h>
Kyösti Mälkki91162702011-11-03 15:22:01 +020027
Edward O'Callaghan77757c22015-01-04 21:33:39 +110028#include <southbridge/intel/i82801dx/i82801dx.h>
29#include <northbridge/intel/e7505/raminit.h>
Kyösti Mälkki93b4ed92012-04-18 21:13:33 +030030
31#include <device/pnp_def.h>
Edward O'Callaghanc3e77fc2015-01-04 16:24:14 +110032#include <superio/smsc/lpc47m10x/lpc47m10x.h>
Kyösti Mälkki91162702011-11-03 15:22:01 +020033
34#define SERIAL_DEV PNP_DEV(0x2e, LPC47M10X2_SP1)
35
Kyösti Mälkki93b4ed92012-04-18 21:13:33 +030036int spd_read_byte(unsigned device, unsigned address)
Kyösti Mälkki91162702011-11-03 15:22:01 +020037{
38 return smbus_read_byte(device, address);
39}
40
Aaron Durbina0a37272014-08-14 08:35:11 -050041#include <cpu/intel/romstage.h>
Kyösti Mälkki3aff1a32012-04-11 12:19:03 +030042void main(unsigned long bist)
Kyösti Mälkki91162702011-11-03 15:22:01 +020043{
44 static const struct mem_controller memctrl[] = {
45 {
46 .d0 = PCI_DEV(0, 0, 0),
47 .d0f1 = PCI_DEV(0, 0, 1),
48 .channel0 = { 0x50, 0x52, 0, 0 },
49 .channel1 = { 0x51, 0x53, 0, 0 },
50 },
51 };
52
Kyösti Mälkki91162702011-11-03 15:22:01 +020053 // Get the serial port running and print a welcome banner
54 lpc47m10x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
55 console_init();
56
57 // Halt if there was a built in self test failure
58 report_bist_failure(bist);
59
60 // If this is a warm boot, some initialization can be skipped
Kyösti Mälkki93b4ed92012-04-18 21:13:33 +030061 if (!e7505_mch_is_ready()) {
Kyösti Mälkki91162702011-11-03 15:22:01 +020062 enable_smbus();
Kyösti Mälkki97c064f2012-04-18 20:33:35 +030063
64 /* The real MCH initialisation. */
65 e7505_mch_init(memctrl);
66
67 /*
68 * ECC scrub invalidates cache, so all stack in CAR
69 * is lost. Only return addresses from main() and
70 * scrub_ecc() are recovered to stack via xmm0-xmm3.
71 */
72#if CONFIG_HW_SCRUBBER
Kyösti Mälkki48713a12014-04-15 18:19:48 +030073#if !CONFIG_USBDEBUG_IN_ROMSTAGE
Kyösti Mälkki97c064f2012-04-18 20:33:35 +030074 unsigned long ret_addr = (unsigned long)((unsigned long*)&bist - 1);
75 e7505_mch_scrub_ecc(ret_addr);
76#endif
Kyösti Mälkkib7d7cfb2013-06-06 10:39:48 +030077#endif
Kyösti Mälkki97c064f2012-04-18 20:33:35 +030078
79 /* Hook for post ECC scrub settings and debug. */
80 e7505_mch_done(memctrl);
Kyösti Mälkki91162702011-11-03 15:22:01 +020081 }
82
Kyösti Mälkki97c064f2012-04-18 20:33:35 +030083 printk(BIOS_DEBUG, "SDRAM is up.\n");
Kyösti Mälkki91162702011-11-03 15:22:01 +020084}