Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 1 | #define ASSEMBLY 1 |
Myles Watson | 1d6d45e | 2009-11-06 17:02:51 +0000 | [diff] [blame] | 2 | #define __PRE_RAM__ |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 3 | |
| 4 | #include <stdint.h> |
Patrick Georgi | 12aba82 | 2009-04-30 07:07:22 +0000 | [diff] [blame] | 5 | #include <string.h> |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 6 | #include <device/pci_def.h> |
| 7 | #include <arch/io.h> |
| 8 | #include <device/pnp_def.h> |
| 9 | #include <arch/romcc_io.h> |
| 10 | #include <cpu/x86/lapic.h> |
Carl-Daniel Hailfinger | 2ee6779 | 2008-10-01 12:52:52 +0000 | [diff] [blame] | 11 | #include <stdlib.h> |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 12 | #include "option_table.h" |
| 13 | #include "pc80/mc146818rtc_early.c" |
| 14 | #include "pc80/serial.c" |
| 15 | #include "arch/i386/lib/console.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 16 | #include "lib/ramtest.c" |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 17 | |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 18 | |
Stefan Reinauer | 373511b | 2005-12-02 23:16:01 +0000 | [diff] [blame] | 19 | #include <cpu/amd/model_fxx_rev.h> |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 20 | #include "northbridge/amd/amdk8/incoherent_ht.c" |
| 21 | #include "southbridge/amd/amd8111/amd8111_early_smbus.c" |
| 22 | #include "northbridge/amd/amdk8/raminit.h" |
| 23 | #include "cpu/amd/model_fxx/apic_timer.c" |
| 24 | #include "lib/delay.c" |
| 25 | |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 26 | #include "cpu/x86/lapic/boot_cpu.c" |
| 27 | #include "northbridge/amd/amdk8/reset_test.c" |
| 28 | #include "northbridge/amd/amdk8/debug.c" |
| 29 | #include "superio/winbond/w83627hf/w83627hf_early_serial.c" |
| 30 | |
| 31 | #include "cpu/amd/mtrr/amd_earlymtrr.c" |
| 32 | #include "cpu/x86/bist.h" |
| 33 | |
| 34 | #include "northbridge/amd/amdk8/setup_resource_map.c" |
| 35 | |
| 36 | #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 37 | |
Yinghai Lu | 9a791df | 2006-04-03 20:38:34 +0000 | [diff] [blame] | 38 | #include "southbridge/amd/amd8111/amd8111_early_ctrl.c" |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 39 | |
| 40 | static void memreset_setup(void) |
| 41 | { |
| 42 | if (is_cpu_pre_c0()) { |
| 43 | outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0 |
| 44 | } |
| 45 | else { |
| 46 | outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1 |
| 47 | } |
| 48 | outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17); |
| 49 | } |
| 50 | |
| 51 | static void memreset(int controllers, const struct mem_controller *ctrl) |
| 52 | { |
| 53 | if (is_cpu_pre_c0()) { |
| 54 | udelay(800); |
| 55 | outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1 |
| 56 | udelay(90); |
| 57 | } |
| 58 | } |
| 59 | |
| 60 | static inline void activate_spd_rom(const struct mem_controller *ctrl) |
| 61 | { |
| 62 | /* nothing to do */ |
| 63 | } |
| 64 | |
| 65 | static inline int spd_read_byte(unsigned device, unsigned address) |
| 66 | { |
| 67 | return smbus_read_byte(device, address); |
| 68 | } |
| 69 | |
Yinghai Lu | 7110f92 | 2006-10-05 06:59:56 +0000 | [diff] [blame] | 70 | #define QRANK_DIMM_SUPPORT 1 |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 71 | |
| 72 | #include "northbridge/amd/amdk8/raminit.c" |
| 73 | #include "northbridge/amd/amdk8/resourcemap.c" |
| 74 | #include "northbridge/amd/amdk8/coherent_ht.c" |
Stefan Reinauer | c13093b | 2009-09-23 18:51:03 +0000 | [diff] [blame] | 75 | #include "lib/generic_sdram.c" |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 76 | |
| 77 | #if CONFIG_LOGICAL_CPUS==1 |
| 78 | #define SET_NB_CFG_54 1 |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 79 | #endif |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 80 | #include "cpu/amd/dualcore/dualcore.c" |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 81 | |
| 82 | #include "cpu/amd/car/copy_and_run.c" |
| 83 | |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 84 | #include "cpu/amd/car/post_cache_as_ram.c" |
| 85 | |
| 86 | #include "cpu/amd/model_fxx/init_cpus.c" |
| 87 | |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 88 | #include "southbridge/amd/amd8111/amd8111_enable_rom.c" |
| 89 | #include "northbridge/amd/amdk8/early_ht.c" |
| 90 | |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 91 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
| 92 | { |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 93 | static const struct mem_controller cpu[] = { |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 94 | { |
| 95 | .node_id = 0, |
| 96 | .f0 = PCI_DEV(0, 0x18, 0), |
| 97 | .f1 = PCI_DEV(0, 0x18, 1), |
| 98 | .f2 = PCI_DEV(0, 0x18, 2), |
| 99 | .f3 = PCI_DEV(0, 0x18, 3), |
| 100 | .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 }, |
| 101 | .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 }, |
| 102 | }, |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 103 | #if CONFIG_MAX_PHYSICAL_CPUS > 1 |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 104 | { |
| 105 | .node_id = 1, |
| 106 | .f0 = PCI_DEV(0, 0x19, 0), |
| 107 | .f1 = PCI_DEV(0, 0x19, 1), |
| 108 | .f2 = PCI_DEV(0, 0x19, 2), |
| 109 | .f3 = PCI_DEV(0, 0x19, 3), |
| 110 | .channel0 = { (0xa<<3)|4, (0xa<<3)|6, 0, 0 }, |
| 111 | .channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 }, |
| 112 | }, |
| 113 | #endif |
| 114 | }; |
| 115 | |
| 116 | int needs_reset; |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 117 | |
Patrick Georgi | 776b85b | 2010-03-18 16:18:58 +0000 | [diff] [blame^] | 118 | if (!((cpu_init_detectedx) || (!boot_cpu()))) { |
| 119 | /* Nothing special needs to be done to find bus 0 */ |
| 120 | /* Allow the HT devices to be found */ |
| 121 | |
| 122 | enumerate_ht_chain(); |
| 123 | |
| 124 | amd8111_enable_rom(); |
| 125 | } |
| 126 | |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 127 | if (bist == 0) { |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 128 | init_cpus(cpu_init_detectedx); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | |
Stefan Reinauer | 0867062 | 2009-06-30 15:17:49 +0000 | [diff] [blame] | 132 | w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 133 | uart_init(); |
| 134 | console_init(); |
| 135 | |
| 136 | /* Halt if there was a built in self test failure */ |
| 137 | report_bist_failure(bist); |
| 138 | |
| 139 | setup_default_resource_map(); |
| 140 | |
| 141 | needs_reset = setup_coherent_ht_domain(); |
| 142 | |
| 143 | #if CONFIG_LOGICAL_CPUS==1 |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 144 | // It is said that we should start core1 after all core0 launched |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 145 | start_other_cores(); |
| 146 | #endif |
Stefan Reinauer | 806e146 | 2005-12-01 10:54:44 +0000 | [diff] [blame] | 147 | // automatically set that for you, but you might meet tight space |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 148 | needs_reset |= ht_setup_chains_x(); |
| 149 | |
| 150 | if (needs_reset) { |
| 151 | print_info("ht reset -\r\n"); |
| 152 | soft_reset(); |
| 153 | } |
| 154 | |
| 155 | enable_smbus(); |
| 156 | |
| 157 | memreset_setup(); |
Carl-Daniel Hailfinger | 2ee6779 | 2008-10-01 12:52:52 +0000 | [diff] [blame] | 158 | sdram_initialize(ARRAY_SIZE(cpu), cpu); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 159 | |
Yinghai Lu | 9a791df | 2006-04-03 20:38:34 +0000 | [diff] [blame] | 160 | post_cache_as_ram(); |
Yinghai Lu | 304f24c | 2005-07-08 02:56:47 +0000 | [diff] [blame] | 161 | } |