blob: 8df48659faac8aa90236f70ad4311bfdb5a1a516 [file] [log] [blame]
Lee Leahye6f2f742016-07-21 09:48:49 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2016 Intel Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <arch/cpu.h>
13#include <console/console.h>
14#include <fsp/util.h>
15#include <lib.h>
16
17void fsp_display_upd_value(const char *name, size_t size, uint64_t old,
18 uint64_t new)
19{
20 size *= 2;
21 if (old == new) {
Lee Leahy5a9ca4d2016-09-28 17:15:00 -070022 printk(BIOS_SPEW, " 0x%0*llx: %s\n", (int)size, new, name);
Lee Leahye6f2f742016-07-21 09:48:49 -070023 } else {
Lee Leahy7732b352017-03-10 08:48:13 -080024 printk(BIOS_SPEW, " 0x%0*llx --> 0x%0*llx: %s\n", (int)size,
25 old, (int)size, new, name);
Lee Leahye6f2f742016-07-21 09:48:49 -070026 }
27}
28
Lee Leahy5a9ca4d2016-09-28 17:15:00 -070029static void fspm_display_arch_params(const FSPM_ARCH_UPD *old,
30 const FSPM_ARCH_UPD *new)
Lee Leahye6f2f742016-07-21 09:48:49 -070031{
32 /* Display the architectural parameters for MemoryInit */
33 printk(BIOS_SPEW, "Architectural UPD values for MemoryInit at: 0x%p\n",
34 new);
35 fsp_display_upd_value("Revision", sizeof(old->Revision),
36 old->Revision, new->Revision);
37 fsp_display_upd_value("NvsBufferPtr", sizeof(old->NvsBufferPtr),
38 (uintptr_t)old->NvsBufferPtr,
39 (uintptr_t)new->NvsBufferPtr);
40 fsp_display_upd_value("StackBase", sizeof(old->StackBase),
41 (uintptr_t)old->StackBase,
42 (uintptr_t)new->StackBase);
43 fsp_display_upd_value("StackSize", sizeof(old->StackSize),
44 old->StackSize, new->StackSize);
45 fsp_display_upd_value("BootLoaderTolumSize",
46 sizeof(old->BootLoaderTolumSize),
47 old->BootLoaderTolumSize, new->BootLoaderTolumSize);
48 fsp_display_upd_value("BootMode", sizeof(old->BootMode),
49 old->BootMode, new->BootMode);
50}
51
52/* Display the UPD parameters for MemoryInit */
53__attribute__((weak)) void soc_display_fspm_upd_params(
Brandon Breitensteinc31ba0e2016-07-27 17:34:45 -070054 const FSPM_UPD *fspm_old_upd,
55 const FSPM_UPD *fspm_new_upd)
Lee Leahye6f2f742016-07-21 09:48:49 -070056{
57 printk(BIOS_SPEW, "UPD values for MemoryInit:\n");
58 hexdump(fspm_new_upd, sizeof(*fspm_new_upd));
59}
60
Brandon Breitensteinc31ba0e2016-07-27 17:34:45 -070061void fspm_display_upd_values(const FSPM_UPD *old,
62 const FSPM_UPD *new)
Lee Leahye6f2f742016-07-21 09:48:49 -070063{
64 /* Display the UPD data */
65 fspm_display_arch_params(&old->FspmArchUpd, &new->FspmArchUpd);
66 soc_display_fspm_upd_params(old, new);
67}
68
69/* Display the UPD parameters for SiliconInit */
70__attribute__((weak)) void soc_display_fsps_upd_params(
Brandon Breitensteinc31ba0e2016-07-27 17:34:45 -070071 const FSPS_UPD *fsps_old_upd,
72 const FSPS_UPD *fsps_new_upd)
Lee Leahye6f2f742016-07-21 09:48:49 -070073{
74 printk(BIOS_SPEW, "UPD values for SiliconInit:\n");
75 hexdump(fsps_new_upd, sizeof(*fsps_new_upd));
76}