blob: 11bf3cca9a5f87f513f6903945d9357d414f5baa [file] [log] [blame]
Andrew Wu00bf6472013-06-26 21:24:59 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 DMP Electronics Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Andrew Wu00bf6472013-06-26 21:24:59 +080014 */
15
16#ifndef _SOUTHBRIDGE_DMP_VORTEX86EX
17#define _SOUTHBRIDGE_DMP_VORTEX86EX
18
19struct southbridge_dmp_vortex86ex_config {
20 /* PCI function enables */
21 /* i.e. so that pci scan bus will find them. */
22 /* I am putting in IDE as an example but obviously this needs
23 * to be more complete!
24 */
25 int enable_ide;
26 /* enables of functions of devices */
27 int enable_usb;
28 int enable_native_ide;
29 int enable_com_ports;
30 int enable_keyboard;
31 int enable_nvram;
32};
33
34#endif /* _SOUTHBRIDGE_DMP_VORTEX86EX */