Zheng Bao | 1088bbf | 2010-03-16 01:41:14 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Zheng Bao | 1088bbf | 2010-03-16 01:41:14 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <console/console.h> |
| 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <device/pci_ops.h> |
| 21 | #include "rs780.h" |
| 22 | |
| 23 | /* for UMA internal graphics */ |
| 24 | void avoid_lpc_dma_deadlock(device_t nb_dev, device_t sb_dev) |
| 25 | { |
| 26 | device_t cpu_f0; |
| 27 | u8 reg; |
| 28 | |
| 29 | cpu_f0 = dev_find_slot(0, PCI_DEVFN(0x18, 0)); |
| 30 | set_nbcfg_enable_bits(cpu_f0, 0x68, 3 << 21, 1 << 21); |
| 31 | |
| 32 | reg = nbpcie_p_read_index(sb_dev, 0x10); |
| 33 | reg |= 0x100; /* bit9=1 */ |
| 34 | nbpcie_p_write_index(sb_dev, 0x10, reg); |
| 35 | |
| 36 | reg = nbpcie_p_read_index(nb_dev, 0x10); |
| 37 | reg |= 0x100; /* bit9=1 */ |
| 38 | nbpcie_p_write_index(nb_dev, 0x10, reg); |
| 39 | |
| 40 | /* Enable NP protocol over PCIE for memory-mapped writes targeting LPC |
| 41 | * Set this bit to avoid a deadlock condition. */ |
| 42 | reg = htiu_read_index(nb_dev, 0x6); |
| 43 | reg |= 0x1000000; /* bit26 */ |
| 44 | htiu_write_index(nb_dev, 0x6, reg); |
| 45 | } |
| 46 | |
| 47 | static void pcie_init(struct device *dev) |
| 48 | { |
| 49 | /* Enable pci error detecting */ |
| 50 | u32 dword; |
| 51 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 52 | printk(BIOS_INFO, "pcie_init in rs780_ht.c\n"); |
Zheng Bao | 1088bbf | 2010-03-16 01:41:14 +0000 | [diff] [blame] | 53 | |
| 54 | /* System error enable */ |
| 55 | dword = pci_read_config32(dev, 0x04); |
| 56 | dword |= (1 << 8); /* System error enable */ |
| 57 | dword |= (1 << 30); /* Clear possible errors */ |
| 58 | pci_write_config32(dev, 0x04, dword); |
| 59 | |
| 60 | /* |
| 61 | * 1 is APIC enable |
| 62 | * 18 is enable nb to accept A4 interrupt request from SB. |
| 63 | */ |
| 64 | dword = pci_read_config32(dev, 0x4C); |
| 65 | dword |= 1 << 1 | 1 << 18; /* Clear possible errors */ |
| 66 | pci_write_config32(dev, 0x4C, dword); |
| 67 | } |
| 68 | |
| 69 | static struct pci_operations lops_pci = { |
| 70 | .set_subsystem = pci_dev_set_subsystem, |
| 71 | }; |
| 72 | |
| 73 | static struct device_operations ht_ops = { |
| 74 | .read_resources = pci_dev_read_resources, |
| 75 | .set_resources = pci_dev_set_resources, |
| 76 | .enable_resources = pci_dev_enable_resources, |
| 77 | .init = pcie_init, |
| 78 | .scan_bus = 0, |
| 79 | .ops_pci = &lops_pci, |
| 80 | }; |
| 81 | |
Stefan Reinauer | 8e96ba2 | 2010-03-16 23:33:29 +0000 | [diff] [blame] | 82 | static const struct pci_driver ht_driver __pci_driver = { |
Zheng Bao | 1088bbf | 2010-03-16 01:41:14 +0000 | [diff] [blame] | 83 | .ops = &ht_ops, |
| 84 | .vendor = PCI_VENDOR_ID_AMD, |
| 85 | .device = PCI_DEVICE_ID_AMD_RS780_HT, |
| 86 | }; |