Michael Xie | 06755e4 | 2008-09-22 13:07:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Michael Xie | 06755e4 | 2008-09-22 13:07:20 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #ifndef RS690_CHIP_H |
| 17 | #define RS690_CHIP_H |
| 18 | |
Uwe Hermann | ff492b1 | 2010-09-24 23:37:25 +0000 | [diff] [blame] | 19 | /* Member variables are defined in devicetree.cb. */ |
Joe Bao | 40d46ba | 2008-12-01 19:49:57 +0000 | [diff] [blame] | 20 | struct southbridge_amd_rs690_config |
Michael Xie | 06755e4 | 2008-09-22 13:07:20 +0000 | [diff] [blame] | 21 | { |
Michael Xie | 06755e4 | 2008-09-22 13:07:20 +0000 | [diff] [blame] | 22 | u8 gpp_configuration; /* The configuration of General Purpose Port, A/B/C/D/E. */ |
| 23 | u8 port_enable; /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */ |
| 24 | u8 gfx_dev2_dev3; /* for GFX Core initialization REFCLK_SEL */ |
Uwe Hermann | ff492b1 | 2010-09-24 23:37:25 +0000 | [diff] [blame] | 25 | u8 gfx_dual_slot; /* Is it dual graphics slots */ |
Michael Xie | 06755e4 | 2008-09-22 13:07:20 +0000 | [diff] [blame] | 26 | u8 gfx_lane_reversal; /* Single/Dual slot lan reversal */ |
| 27 | u8 gfx_tmds; /* whether support TMDS? */ |
| 28 | u8 gfx_compliance; /* whether support compliance? */ |
Martin Roth | a9e3a75 | 2014-12-16 20:52:23 -0700 | [diff] [blame] | 29 | u8 gfx_reconfiguration; /* Dynamic Link Width Control */ |
Michael Xie | 06755e4 | 2008-09-22 13:07:20 +0000 | [diff] [blame] | 30 | u8 gfx_link_width; /* Desired width of lane 2 */ |
| 31 | }; |
Michael Xie | 06755e4 | 2008-09-22 13:07:20 +0000 | [diff] [blame] | 32 | |
| 33 | #endif /* RS690_CHIP_H */ |