Vladimir Serbinenko | 9bf05de | 2013-11-14 19:11:19 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org> |
| 6 | * Copyright (C) 2013 Vladimir Serbinenko <phcoder@gmail.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; version 2 of |
| 11 | * the License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| 21 | * MA 02110-1301 USA |
| 22 | */ |
| 23 | |
| 24 | #include <console/console.h> |
| 25 | #include <device/device.h> |
| 26 | #include <arch/io.h> |
| 27 | #include <delay.h> |
| 28 | #include <device/pci_def.h> |
| 29 | #include <device/pci_ops.h> |
| 30 | #include <device/pci_ids.h> |
| 31 | #include <arch/io.h> |
| 32 | #include <ec/lenovo/pmh7/pmh7.h> |
| 33 | #include <ec/acpi/ec.h> |
| 34 | #include <ec/lenovo/h8/h8.h> |
| 35 | #include <northbridge/intel/nehalem/nehalem.h> |
| 36 | #include <southbridge/intel/bd82x6x/pch.h> |
| 37 | |
| 38 | #include <pc80/mc146818rtc.h> |
| 39 | #include "dock.h" |
Vladimir Serbinenko | 517406a | 2014-01-10 01:01:42 +0100 | [diff] [blame] | 40 | #include "hda_verb.h" |
Vladimir Serbinenko | 9bf05de | 2013-11-14 19:11:19 +0100 | [diff] [blame] | 41 | #include <arch/x86/include/arch/acpigen.h> |
| 42 | #if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE |
| 43 | #include <x86emu/regs.h> |
| 44 | #include <arch/interrupt.h> |
| 45 | #endif |
| 46 | #include <pc80/keyboard.h> |
| 47 | #include <cpu/x86/lapic.h> |
| 48 | #include <device/pci.h> |
| 49 | #include <smbios.h> |
| 50 | |
| 51 | static acpi_cstate_t cst_entries[] = { |
| 52 | {1, 1, 1000, {0x7f, 1, 2, {0}, 1, 0}}, |
| 53 | {2, 1, 500, {0x01, 8, 0, {0}, DEFAULT_PMBASE + LV2, 0}}, |
| 54 | {2, 17, 250, {0x01, 8, 0, {0}, DEFAULT_PMBASE + LV3, 0}}, |
| 55 | }; |
| 56 | |
| 57 | int get_cst_entries(acpi_cstate_t ** entries) |
| 58 | { |
| 59 | *entries = cst_entries; |
| 60 | return ARRAY_SIZE(cst_entries); |
| 61 | } |
| 62 | |
| 63 | #if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE |
| 64 | |
| 65 | static int int15_handler(void) |
| 66 | { |
| 67 | switch ((X86_EAX & 0xffff)) { |
| 68 | /* Get boot display. */ |
| 69 | case 0x5f35: |
| 70 | X86_EAX = 0x5f; |
| 71 | /* The flags are: |
| 72 | 1 - VGA |
| 73 | 4 - DisplayPort |
| 74 | 8 - LCD |
| 75 | */ |
| 76 | X86_ECX = 0x8; |
| 77 | |
| 78 | return 1; |
| 79 | case 0x5f40: |
| 80 | X86_EAX = 0x5f; |
| 81 | X86_ECX = 0x2; |
| 82 | return 1; |
| 83 | default: |
| 84 | printk(BIOS_WARNING, "Unknown INT15 function %04x!\n", |
| 85 | X86_EAX & 0xffff); |
| 86 | return 0; |
| 87 | } |
| 88 | } |
| 89 | #endif |
| 90 | |
| 91 | const char *smbios_mainboard_version(void) |
| 92 | { |
| 93 | return "Lenovo X201"; |
| 94 | } |
| 95 | |
Vladimir Serbinenko | 517406a | 2014-01-10 01:01:42 +0100 | [diff] [blame] | 96 | /* Audio Setup */ |
| 97 | |
| 98 | extern const u32 *cim_verb_data; |
| 99 | extern u32 cim_verb_data_size; |
| 100 | |
| 101 | static void verb_setup(void) |
| 102 | { |
| 103 | cim_verb_data = mainboard_cim_verb_data; |
| 104 | cim_verb_data_size = sizeof(mainboard_cim_verb_data); |
| 105 | } |
| 106 | |
Vladimir Serbinenko | 770c71f | 2014-01-28 00:05:29 +0100 | [diff] [blame^] | 107 | static void mainboard_init(device_t dev) |
Vladimir Serbinenko | 9bf05de | 2013-11-14 19:11:19 +0100 | [diff] [blame] | 108 | { |
Vladimir Serbinenko | 9bf05de | 2013-11-14 19:11:19 +0100 | [diff] [blame] | 109 | printk(BIOS_SPEW, "starting SPI configuration\n"); |
| 110 | |
| 111 | /* Configure SPI. */ |
| 112 | RCBA32(0x3800) = 0x07ff0500; |
| 113 | RCBA32(0x3804) = 0x3f046008; |
| 114 | RCBA32(0x3808) = 0x0058efc0; |
| 115 | RCBA32(0x384c) = 0x92000000; |
| 116 | RCBA32(0x3850) = 0x00000a0b; |
| 117 | RCBA32(0x3858) = 0x07ff0500; |
| 118 | RCBA32(0x385c) = 0x04ff0003; |
| 119 | RCBA32(0x3860) = 0x00020001; |
| 120 | RCBA32(0x3864) = 0x00000fff; |
| 121 | RCBA32(0x3874) = 0; |
| 122 | RCBA32(0x3890) = 0xf8400000; |
| 123 | RCBA32(0x3894) = 0x143b5006; |
| 124 | RCBA32(0x3898) = 0x05200302; |
| 125 | RCBA32(0x389c) = 0x0601209f; |
| 126 | RCBA32(0x38b0) = 0x00000004; |
| 127 | RCBA32(0x38b4) = 0x03040002; |
| 128 | RCBA32(0x38c0) = 0x00000007; |
| 129 | RCBA32(0x38c4) = 0x00802005; |
| 130 | RCBA32(0x38c8) = 0x00002005; |
| 131 | RCBA32(0x3804) = 0x3f04e008; |
| 132 | |
| 133 | printk(BIOS_SPEW, "SPI configured\n"); |
Vladimir Serbinenko | 770c71f | 2014-01-28 00:05:29 +0100 | [diff] [blame^] | 134 | /* This sneaked in here, because X201 SuperIO chip isn't really |
| 135 | connected to anything and hence we don't init it. |
| 136 | */ |
| 137 | pc_keyboard_init(0); |
| 138 | |
| 139 | /* Enable expresscard hotplug events. */ |
| 140 | pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), |
| 141 | 0xd8, |
| 142 | pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), 0xd8) |
| 143 | | (1 << 30)); |
| 144 | pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), |
| 145 | 0x42, 0x142); |
| 146 | } |
| 147 | |
| 148 | static void mainboard_enable(device_t dev) |
| 149 | { |
| 150 | device_t dev0; |
| 151 | u16 pmbase; |
| 152 | |
| 153 | dev->ops->init = mainboard_init; |
Vladimir Serbinenko | 9bf05de | 2013-11-14 19:11:19 +0100 | [diff] [blame] | 154 | |
| 155 | pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), |
| 156 | PMBASE) & 0xff80; |
| 157 | |
| 158 | printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase); |
| 159 | |
| 160 | outl(0, pmbase + SMI_EN); |
| 161 | |
| 162 | enable_lapic(); |
| 163 | pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE, |
| 164 | DEFAULT_GPIOBASE | 1); |
| 165 | pci_write_config8(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_CNTL, |
| 166 | 0x10); |
| 167 | |
| 168 | /* If we're resuming from suspend, blink suspend LED */ |
| 169 | dev0 = dev_find_slot(0, PCI_DEVFN(0, 0)); |
| 170 | if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC) |
| 171 | ec_write(0x0c, 0xc7); |
| 172 | |
| 173 | #if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE |
| 174 | /* Install custom int15 handler for VGA OPROM */ |
| 175 | mainboard_interrupt_handlers(0x15, &int15_handler); |
| 176 | #endif |
| 177 | |
Vladimir Serbinenko | 517406a | 2014-01-10 01:01:42 +0100 | [diff] [blame] | 178 | verb_setup(); |
Vladimir Serbinenko | 9bf05de | 2013-11-14 19:11:19 +0100 | [diff] [blame] | 179 | } |
| 180 | |
| 181 | struct chip_operations mainboard_ops = { |
| 182 | .enable_dev = mainboard_enable, |
| 183 | }; |