Martin Roth | 7687e77 | 2023-08-22 16:32:20 -0600 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
| 2 | |
Marc Jones | 9ef6e52 | 2016-09-20 20:16:20 -0600 | [diff] [blame] | 3 | /* $NoKeywords:$ */ |
| 4 | /** |
| 5 | * @file |
| 6 | * |
| 7 | * AMD CPU Register Table Related Functions |
| 8 | * |
| 9 | * Contains the definition of the CPU CPUID MSRs and PCI registers with BKDG recommended values |
| 10 | * |
| 11 | * @xrefitem bom "File Content Label" "Release Content" |
| 12 | * @e project: AGESA |
| 13 | * @e sub-project: CPU |
Marshall Dawson | a040065 | 2016-10-15 09:20:43 -0600 | [diff] [blame] | 14 | * @e \$Revision$ @e \$Date$ |
Marc Jones | 9ef6e52 | 2016-09-20 20:16:20 -0600 | [diff] [blame] | 15 | * |
| 16 | */ |
| 17 | /***************************************************************************** |
| 18 | * |
Marshall Dawson | a040065 | 2016-10-15 09:20:43 -0600 | [diff] [blame] | 19 | * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc. |
Marc Jones | 9ef6e52 | 2016-09-20 20:16:20 -0600 | [diff] [blame] | 20 | * All rights reserved. |
| 21 | * |
| 22 | * Redistribution and use in source and binary forms, with or without |
| 23 | * modification, are permitted provided that the following conditions are met: |
| 24 | * * Redistributions of source code must retain the above copyright |
| 25 | * notice, this list of conditions and the following disclaimer. |
| 26 | * * Redistributions in binary form must reproduce the above copyright |
| 27 | * notice, this list of conditions and the following disclaimer in the |
| 28 | * documentation and/or other materials provided with the distribution. |
| 29 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 30 | * its contributors may be used to endorse or promote products derived |
| 31 | * from this software without specific prior written permission. |
| 32 | * |
| 33 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 34 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 35 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 36 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 37 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 38 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 39 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 40 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 41 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 42 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 43 | * |
| 44 | ***************************************************************************/ |
| 45 | |
Martin Roth | ae01634 | 2017-11-16 22:46:56 -0700 | [diff] [blame] | 46 | #include <check_for_wrapper.h> |
| 47 | |
Marc Jones | 9ef6e52 | 2016-09-20 20:16:20 -0600 | [diff] [blame] | 48 | #ifndef _CPU_FAM_REGISTERS_H_ |
| 49 | #define _CPU_FAM_REGISTERS_H_ |
| 50 | |
| 51 | /* |
| 52 | *-------------------------------------------------------------- |
| 53 | * |
| 54 | * M O D U L E S U S E D |
| 55 | * |
| 56 | *--------------------------------------------------------------- |
| 57 | */ |
| 58 | |
| 59 | /* |
| 60 | *-------------------------------------------------------------- |
| 61 | * |
| 62 | * D E F I N I T I O N S / M A C R O S |
| 63 | * |
| 64 | *--------------------------------------------------------------- |
| 65 | */ |
| 66 | |
| 67 | // This define should be equal to the total number of families |
| 68 | // in the cpuFamily enum. |
| 69 | #define MAX_CPU_FAMILIES 15 |
| 70 | #define MAX_CPU_REVISIONS 15 // Max Cpu Revisions Per Family |
| 71 | |
| 72 | // CPU_LOGICAL_ID.Family equates |
| 73 | // Family 15h equates |
| 74 | #define AMD_FAMILY_15_CZ 0x0004u |
| 75 | #define AMD_FAMILY_CZ (AMD_FAMILY_15_CZ) |
| 76 | |
| 77 | #define AMD_FAMILY_15_ST 0x0008u |
| 78 | #define AMD_FAMILY_ST (AMD_FAMILY_15_ST) |
| 79 | |
| 80 | #define AMD_FAMILY_15 (AMD_FAMILY_15_CZ | AMD_FAMILY_ST) |
| 81 | |
| 82 | // Family Unknown |
| 83 | #define AMD_FAMILY_UNKNOWN 0x8000u |
| 84 | |
| 85 | |
| 86 | // Family 15h CPU_LOGICAL_ID.Revision equates |
| 87 | // ------------------------------------- |
| 88 | |
| 89 | // Family 15h CZ steppings |
| 90 | #define AMD_F15_CZ_A0 0x0001u |
| 91 | #define AMD_F15_CZ_A1 0x0002u |
| 92 | #define AMD_F15_BR_A1 0x0004u |
| 93 | // Family 15h ST steppings |
| 94 | #define AMD_F15_ST_A0 0x0010u |
| 95 | // Family 15h Unknown stepping |
| 96 | #define AMD_F15_UNKNOWN 0x8000u |
| 97 | // CZ and BR |
| 98 | #define AMD_F15_BR_Ax (AMD_F15_BR_A1) |
| 99 | #define AMD_F15_BR_ALL (AMD_F15_BR_Ax) |
| 100 | |
| 101 | #define AMD_F15_CZ_Ax (AMD_F15_CZ_A0 | AMD_F15_CZ_A1 | AMD_F15_BR_Ax) |
| 102 | #define AMD_F15_CZ_ALL (AMD_F15_CZ_Ax | AMD_F15_BR_ALL) |
| 103 | |
| 104 | // ST |
| 105 | #define AMD_F15_ST_Ax (AMD_F15_ST_A0) |
| 106 | #define AMD_F15_ST_ALL (AMD_F15_ST_Ax) |
| 107 | |
| 108 | #define AMD_F15_ALL (AMD_F15_CZ_ALL | AMD_F15_ST_ALL) |
| 109 | |
| 110 | #endif // _CPU_FAM_REGISTERS_H_ |
| 111 | |