Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 75a62e76486f63f6dadb5492c205570ace81e9d5 / . / src / include / device / pci_ops.h
blob: 9e9baa0d609025a951a83472b554e694d96807e4 [file] [log] [blame]
Eric Biederman5899fd82003-04-24 06:25:08 +0000[diff] [blame]1#ifndef PCI_OPS_H
2#define PCI_OPS_H
3
Aaron Durbin75a62e72018-09-13 02:10:45 -0600[diff] [blame^]4#include <compiler.h>
Eric Biederman5899fd82003-04-24 06:25:08 +0000[diff] [blame]5#include <stdint.h>
Eric Biederman7a5416a2003-06-12 19:23:51 +0000[diff] [blame]6#include <device/device.h>
Eric Biederman018d8dd2004-11-04 11:04:33 +0000[diff] [blame]7#include <arch/pci_ops.h>
Eric Biederman5899fd82003-04-24 06:25:08 +0000[diff] [blame]8
Kyösti Mälkkief844012013-06-25 23:17:43 +0300[diff] [blame]9#ifndef __SIMPLE_DEVICE__
Edward O'Callaghan016732f2014-10-29 03:04:40 +1100[diff] [blame]10u8 pci_read_config8(struct device *dev, unsigned int where);
11u16 pci_read_config16(struct device *dev, unsigned int where);
12u32 pci_read_config32(struct device *dev, unsigned int where);
13void pci_write_config8(struct device *dev, unsigned int where, u8 val);
14void pci_write_config16(struct device *dev, unsigned int where, u16 val);
15void pci_write_config32(struct device *dev, unsigned int where, u32 val);
Eric Biederman7a5416a2003-06-12 19:23:51 +0000[diff] [blame]16
Stefan Reinauer24d1d4b2013-03-21 11:51:41 -0700[diff] [blame]17#endif
Stefan Reinauer43b29cf2009-03-06 19:11:52 +0000[diff] [blame]18
Patrick Rudolphe56189c2018-04-18 10:11:59 +0200[diff] [blame]19/*
20 * Use device_t here as the functions are to be used with either
21 * __SIMPLE_DEVICE__ defined or undefined.
22 */
Aaron Durbin75a62e72018-09-13 02:10:45 -0600[diff] [blame^]23static __always_inline
Patrick Rudolphe56189c2018-04-18 10:11:59 +0200[diff] [blame]24void pci_or_config8(device_t dev, unsigned int where, u8 ormask)
25{
26 u8 value = pci_read_config8(dev, where);
27 pci_write_config8(dev, where, value | ormask);
28}
29
Aaron Durbin75a62e72018-09-13 02:10:45 -0600[diff] [blame^]30static __always_inline
Patrick Rudolphe56189c2018-04-18 10:11:59 +0200[diff] [blame]31void pci_or_config16(device_t dev, unsigned int where, u16 ormask)
32{
33 u16 value = pci_read_config16(dev, where);
34 pci_write_config16(dev, where, value | ormask);
35}
36
Aaron Durbin75a62e72018-09-13 02:10:45 -0600[diff] [blame^]37static __always_inline
Patrick Rudolphe56189c2018-04-18 10:11:59 +0200[diff] [blame]38void pci_or_config32(device_t dev, unsigned int where, u32 ormask)
39{
40 u32 value = pci_read_config32(dev, where);
41 pci_write_config32(dev, where, value | ormask);
42}
43
Aaron Durbin75a62e72018-09-13 02:10:45 -0600[diff] [blame^]44static __always_inline
Patrick Rudolphe56189c2018-04-18 10:11:59 +0200[diff] [blame]45void pci_update_config8(device_t dev, int reg, u8 mask, u8 or)
46{
47 u8 reg8;
48
49 reg8 = pci_read_config8(dev, reg);
50 reg8 &= mask;
51 reg8 |= or;
52 pci_write_config8(dev, reg, reg8);
53}
54
Aaron Durbin75a62e72018-09-13 02:10:45 -0600[diff] [blame^]55static __always_inline
Patrick Rudolphe56189c2018-04-18 10:11:59 +0200[diff] [blame]56void pci_update_config16(device_t dev, int reg, u16 mask, u16 or)
57{
58 u16 reg16;
59
60 reg16 = pci_read_config16(dev, reg);
61 reg16 &= mask;
62 reg16 |= or;
63 pci_write_config16(dev, reg, reg16);
64}
65
Aaron Durbin75a62e72018-09-13 02:10:45 -0600[diff] [blame^]66static __always_inline
Patrick Rudolphe56189c2018-04-18 10:11:59 +0200[diff] [blame]67void pci_update_config32(device_t dev, int reg, u32 mask, u32 or)
68{
69 u32 reg32;
70
71 reg32 = pci_read_config32(dev, reg);
72 reg32 &= mask;
73 reg32 |= or;
74 pci_write_config32(dev, reg, reg32);
75}
76
Patrick Rudolphf5180a92018-04-18 10:31:19 +0200[diff] [blame]77const struct pci_bus_operations *pci_bus_default_ops(struct device *dev);
78
Eric Biederman5899fd82003-04-24 06:25:08 +0000[diff] [blame]79#endif /* PCI_OPS_H */