blob: 1f1aef0b9367eb3ad5ee057c11be6215c65083f1 [file] [log] [blame]
Uwe Hermann9da69f82007-11-30 02:08:26 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Uwe Hermann9da69f82007-11-30 02:08:26 +00003 *
4 * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <stdint.h>
22#include <console/console.h>
23#include <device/device.h>
24#include <device/pci.h>
25#include <device/pci_ids.h>
26#include <pc80/isa-dma.h>
27#include <pc80/mc146818rtc.h>
28#include "i82371eb.h"
29
30static void isa_init(struct device *dev)
31{
Uwe Hermann9da69f82007-11-30 02:08:26 +000032 u32 reg32;
33
34 /* Initialize the real time clock (RTC). */
35 rtc_init(0);
36
Uwe Hermann9da69f82007-11-30 02:08:26 +000037 /*
38 * The PIIX4 can support the full ISA bus, or the Extended I/O (EIO)
39 * bus, which is a subset of ISA. We select the full ISA bus here.
40 */
41 reg32 = pci_read_config32(dev, GENCFG);
42 reg32 |= ISA; /* Select ISA, not EIO. */
43 pci_write_config16(dev, GENCFG, reg32);
44
45 /* Initialize ISA DMA. */
46 isa_dma_init();
47}
48
Myles Watson29cc9ed2009-07-02 18:56:24 +000049static void sb_read_resources(struct device *dev)
50{
51 struct resource *res;
52
53 pci_dev_read_resources(dev);
54
55 res = new_resource(dev, 1);
56 res->base = 0x0UL;
57 res->size = 0x1000UL;
58 res->limit = 0xffffUL;
59 res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
60
61 res = new_resource(dev, 2);
62 res->base = 0xff800000UL;
63 res->size = 0x00800000UL; /* 8 MB for flash */
64 res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
65
66 res = new_resource(dev, 3); /* IOAPIC */
67 res->base = 0xfec00000;
68 res->size = 0x00001000;
69 res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
70}
71
Uwe Hermann312673c2009-10-27 21:49:33 +000072static const struct device_operations isa_ops = {
Myles Watson29cc9ed2009-07-02 18:56:24 +000073 .read_resources = sb_read_resources,
Uwe Hermann9da69f82007-11-30 02:08:26 +000074 .set_resources = pci_dev_set_resources,
75 .enable_resources = pci_dev_enable_resources,
76 .init = isa_init,
77 .scan_bus = scan_static_bus, /* TODO: Needed? */
78 .enable = 0,
79 .ops_pci = 0, /* No subsystem IDs on 82371EB! */
80};
81
82static const struct pci_driver isa_driver __pci_driver = {
83 .ops = &isa_ops,
84 .vendor = PCI_VENDOR_ID_INTEL,
85 .device = PCI_DEVICE_ID_INTEL_82371AB_ISA,
86};
Myles Watson0520d552009-05-11 22:44:14 +000087
88static const struct pci_driver isa_SB_driver __pci_driver = {
89 .ops = &isa_ops,
90 .vendor = PCI_VENDOR_ID_INTEL,
91 .device = PCI_DEVICE_ID_INTEL_82371SB_ISA,
92};