Lee Leahy | c421041 | 2015-06-29 11:37:56 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2010 coresystems GmbH |
| 5 | * Copyright (C) 2014 Google Inc. |
| 6 | * Copyright (C) 2015 Intel Corporation. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
Lee Leahy | b993d2f | 2015-07-17 11:07:54 -0700 | [diff] [blame] | 19 | * Foundation, Inc. |
Lee Leahy | c421041 | 2015-06-29 11:37:56 -0700 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #include <cbfs.h> |
| 23 | #include <console/console.h> |
| 24 | #include <string.h> |
| 25 | #include <ec/google/chromeec/ec.h> |
| 26 | #include <soc/cpu.h> |
| 27 | #include <soc/gpio.h> |
| 28 | #include <soc/pei_data.h> |
| 29 | #include <soc/pei_wrapper.h> |
| 30 | #include <soc/pm.h> |
| 31 | #include <soc/romstage.h> |
Wenkai Du | 1105fad | 2015-08-21 13:11:00 -0700 | [diff] [blame] | 32 | #include "gpio.h" |
Lee Leahy | c421041 | 2015-06-29 11:37:56 -0700 | [diff] [blame] | 33 | #include "spd/spd.h" |
| 34 | |
Wenkai Du | 1105fad | 2015-08-21 13:11:00 -0700 | [diff] [blame] | 35 | static void early_config_gpio(void) |
| 36 | { |
| 37 | /* This is a hack for FSP because it does things in MemoryInit() |
| 38 | * which it shouldn't be. We have to prepare certain gpios here |
| 39 | * because of the brokenness in FSP. */ |
| 40 | gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); |
| 41 | } |
| 42 | |
Lee Leahy | c421041 | 2015-06-29 11:37:56 -0700 | [diff] [blame] | 43 | void mainboard_romstage_entry(struct romstage_params *params) |
| 44 | { |
Duncan Laurie | 963bfa7 | 2015-09-04 10:29:58 -0700 | [diff] [blame^] | 45 | /* Ensure the EC and PD are in the right mode for recovery */ |
| 46 | google_chromeec_early_init(); |
| 47 | |
Lee Leahy | c421041 | 2015-06-29 11:37:56 -0700 | [diff] [blame] | 48 | post_code(0x31); |
Wenkai Du | 1105fad | 2015-08-21 13:11:00 -0700 | [diff] [blame] | 49 | early_config_gpio(); |
| 50 | |
Lee Leahy | c421041 | 2015-06-29 11:37:56 -0700 | [diff] [blame] | 51 | /* Fill out PEI DATA */ |
| 52 | mainboard_fill_pei_data(params->pei_data); |
| 53 | mainboard_fill_spd_data(params->pei_data); |
| 54 | /* Initliaze memory */ |
| 55 | romstage_common(params); |
| 56 | } |
| 57 | |
| 58 | void mainboard_memory_init_params( |
| 59 | struct romstage_params *params, |
| 60 | MEMORY_INIT_UPD *memory_params) |
| 61 | { |
| 62 | if (params->pei_data->spd_data[0][0][0] != 0) { |
| 63 | memory_params->MemorySpdPtr00 = |
| 64 | (UINT32)(params->pei_data->spd_data[0][0]); |
| 65 | memory_params->MemorySpdPtr10 = |
| 66 | (UINT32)(params->pei_data->spd_data[1][0]); |
| 67 | printk(BIOS_SPEW, "0x%08x: SpdDataBuffer_0_0\n", |
| 68 | memory_params->MemorySpdPtr00); |
| 69 | printk(BIOS_SPEW, "0x%08x: SpdDataBuffer_0_1\n", |
| 70 | memory_params->MemorySpdPtr01); |
| 71 | printk(BIOS_SPEW, "0x%08x: SpdDataBuffer_1_0\n", |
| 72 | memory_params->MemorySpdPtr10); |
| 73 | printk(BIOS_SPEW, "0x%08x: SpdDataBuffer_1_1\n", |
| 74 | memory_params->MemorySpdPtr11); |
| 75 | } |
| 76 | memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0], |
| 77 | sizeof(params->pei_data->dq_map[0])); |
| 78 | memcpy(memory_params->DqByteMapCh1, params->pei_data->dq_map[1], |
| 79 | sizeof(params->pei_data->dq_map[1])); |
| 80 | memcpy(memory_params->DqsMapCpu2DramCh0, params->pei_data->dqs_map[0], |
| 81 | sizeof(params->pei_data->dqs_map[0])); |
| 82 | memcpy(memory_params->DqsMapCpu2DramCh1, params->pei_data->dqs_map[1], |
| 83 | sizeof(params->pei_data->dqs_map[1])); |
| 84 | memcpy(memory_params->RcompResistor, params->pei_data->RcompResistor, |
| 85 | sizeof(params->pei_data->RcompResistor)); |
| 86 | memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget, |
| 87 | sizeof(params->pei_data->RcompTarget)); |
| 88 | memory_params->MemorySpdDataLen = SPD_LEN; |
| 89 | memory_params->DqPinsInterleaved = FALSE; |
| 90 | } |