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Benjamin Doron289a67d2019-09-22 17:33:12 +10001## SPDX-License-Identifier: GPL-2.0-only
2
3chip soc/intel/skylake
4
5 # Intel Common SoC Config
6 #+-------------------+---------------------------+
7 #| Field | Value |
8 #+-------------------+---------------------------+
Benjamin Doron289a67d2019-09-22 17:33:12 +10009 #| I2C0 | Touchscreen |
10 #| I2C1 | Touchpad |
11 #+-------------------+---------------------------+
12 register "common_soc_config" = "{
13 .i2c[0] = {
14 .speed = I2C_SPEED_FAST,
15 },
16 .i2c[1] = {
17 .speed = I2C_SPEED_FAST,
18 .speed_config[0] = {
19 .speed = I2C_SPEED_FAST,
20 .scl_lcnt = 128,
21 .scl_hcnt = 160,
22 .sda_hold = 30,
23 }
24 },
25 }"
26
27 # TODO: Drop once CB:55224 is merged
28 register "SerialIoDevMode" = "{
29 [PchSerialIoIndexI2C0] = PchSerialIoPci,
30 [PchSerialIoIndexI2C1] = PchSerialIoPci,
31 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
32 [PchSerialIoIndexUart2] = PchSerialIoSkipInit,
33 }"
34
Arthur Heymans69cd7292022-11-07 13:52:11 +010035 device cpu_cluster 0 on end
Benjamin Doron289a67d2019-09-22 17:33:12 +100036 device domain 0 on
37 subsystemid 0x1025 0x1037 inherit
38 device ref system_agent on
39 # Enable "Enhanced Intel SpeedStep"
40 register "eist_enable" = "1"
41
42 # Set the Thermal Control Circuit (TCC) activation value to 97C
43 # even though FSP integration guide says to set it to 100C for SKL-U
44 # (offset at 0), because when the TCC activates at 100C, the CPU
45 # will have already shut itself down from overheating protection.
46 register "tcc_offset" = "3" # TCC of 97C
47
48 register "SaGv" = "SaGv_Enabled"
49
50 # VR Slew rate setting for improving audible noise
51 register "AcousticNoiseMitigation" = "1"
52 register "SlowSlewRateForIa" = "3" # Fast/16
53 register "SlowSlewRateForGt" = "3" # Fast/16
54 register "SlowSlewRateForSa" = "0" # Fast/2
55 register "FastPkgCRampDisableIa" = "0"
56 register "FastPkgCRampDisableGt" = "0"
57 register "FastPkgCRampDisableSa" = "0"
58
59 # PL1, PL2 override 35W, PL4 override 43W
60 register "power_limits_config" = "{
61 .tdp_pl1_override = 35,
62 .tdp_pl2_override = 35,
63 .tdp_pl4 = 43,
64 }"
65
66 # ISL95857 VR
67 # Send VR specific command for PS4 exit issue
68 register "SendVrMbxCmd" = "2"
69 # Send VR mailbox command for IA/GT/SA rails
70 register "IslVrCmd" = "2"
71 end
72 device ref igpu on
73 register "panel_cfg" = "{
74 .up_delay_ms = 150, // T3
75 .down_delay_ms = 50, // T10
76 .cycle_delay_ms = 500, // T12
77 .backlight_on_delay_ms = 1, // T7
78 .backlight_off_delay_ms = 200, // T9
79 .backlight_pwm_hz = 1000,
80 }"
81
82 # IGD Displays; LFP and 3*EFP
83 # FIXME: VBT does not define EFP3, board has no EFP2?
84 register "gfx" = "{
85 .use_spread_spectrum_clock = 1,
86 .ndid = 4, .did = { 0x0400, 0x0300, 0x0301, 0x0302 }
87 }"
88
89 register "PrimaryDisplay" = "Display_Switchable"
90 end
91 device ref sa_thermal off end
92 device ref chap off end
93 device ref gmm off end
94 device ref south_xhci on
95 register "usb2_ports[0]" = "{
96 .enable = 1,
97 .ocpin = OC_SKIP,
98 .tx_bias = USB2_BIAS_17MV,
99 .tx_emp_enable = USB2_DE_EMP_ON,
100 .pre_emp_bias = USB2_BIAS_28MV,
101 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
102 }" # Type-A Port (right)
103 register "usb2_ports[1]" = "{
104 .enable = 1,
105 .ocpin = OC_SKIP,
106 .tx_bias = USB2_BIAS_17MV,
107 .tx_emp_enable = USB2_DE_EMP_ON,
108 .pre_emp_bias = USB2_BIAS_28MV,
109 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
110 }" # Type-A Port (right)
111 register "usb2_ports[2]" = "{
112 .enable = 1,
113 .ocpin = OC_SKIP,
114 .tx_bias = USB2_BIAS_17MV,
115 .tx_emp_enable = USB2_DE_EMP_ON,
116 .pre_emp_bias = USB2_BIAS_28MV,
117 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
118 }" # Type-C Port
119 register "usb2_ports[3]" = "USB2_PORT_FLEX(OC_SKIP)" # Type-A Port (left)
120 register "usb2_ports[4]" = "USB2_PORT_FLEX(OC_SKIP)" # Bluetooth
121 register "usb2_ports[5]" = "USB2_PORT_FLEX(OC_SKIP)" # Touchscreen
122 register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Webcam
123 register "usb2_ports[7]" = "USB2_PORT_FLEX(OC_SKIP)" # SD
124 register "usb2_ports[8]" = "USB2_PORT_FLEX(OC_SKIP)" # Finger-printer
125
126 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port (right); Capable of OTG
127 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port (right)
128 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port
129 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port
130 chip drivers/usb/acpi
131 register "desc" = ""Root Hub""
132 register "type" = "UPC_TYPE_HUB"
133 device usb 0.0 on
134 chip drivers/usb/acpi
135 register "desc" = ""USB2 Type-A Right""
136 register "type" = "UPC_TYPE_USB3_A"
137 register "group" = "ACPI_PLD_GROUP(0, 1)"
138 device usb 2.0 on end
139 end
140 chip drivers/usb/acpi
141 register "desc" = ""USB2 Type-A Right""
142 register "type" = "UPC_TYPE_USB3_A"
143 register "group" = "ACPI_PLD_GROUP(0, 2)"
144 device usb 2.1 on end
145 end
146 chip drivers/usb/acpi
147 register "desc" = ""USB2 Type-C""
148 register "type" = "UPC_TYPE_C_USB2_SS"
149 register "group" = "ACPI_PLD_GROUP(0, 3)"
150 device usb 2.2 on end
151 end
152 chip drivers/usb/acpi
153 register "desc" = ""USB2 Type-A Left""
154 register "type" = "UPC_TYPE_A"
155 register "group" = "ACPI_PLD_GROUP(0, 4)"
156 device usb 2.3 on end
157 end
158 chip drivers/usb/acpi
159 register "desc" = ""USB2 Bluetooth""
160 register "type" = "UPC_TYPE_UNUSED"
161 register "group" = "ACPI_PLD_GROUP(0, 5)"
162 device usb 2.4 on end
163 end
164 chip drivers/usb/acpi
165 register "desc" = ""USB2 Touchscreen""
166 register "type" = "UPC_TYPE_UNUSED"
167 register "group" = "ACPI_PLD_GROUP(0, 6)"
168 device usb 2.5 on end
169 end
170 chip drivers/usb/acpi
171 register "desc" = ""USB2 Webcam""
172 register "type" = "UPC_TYPE_UNUSED"
173 register "group" = "ACPI_PLD_GROUP(0, 7)"
174 device usb 2.6 on end
175 end
176 chip drivers/usb/acpi
177 register "desc" = ""USB2 SD""
178 register "type" = "UPC_TYPE_UNUSED"
179 register "group" = "ACPI_PLD_GROUP(0, 8)"
180 device usb 2.7 on end
181 end
182 chip drivers/usb/acpi
183 register "desc" = ""USB2 Finger-printer""
184 register "type" = "UPC_TYPE_UNUSED"
185 register "group" = "ACPI_PLD_GROUP(0, 9)"
186 device usb 2.8 on end
187 end
188 chip drivers/usb/acpi
189 register "desc" = ""USB3 Type-A Right""
190 register "type" = "UPC_TYPE_USB3_A"
191 register "group" = "ACPI_PLD_GROUP(0, 1)"
192 device usb 3.0 on end
193 end
194 chip drivers/usb/acpi
195 register "desc" = ""USB3 Type-A Right""
196 register "type" = "UPC_TYPE_USB3_A"
197 register "group" = "ACPI_PLD_GROUP(0, 2)"
198 device usb 3.1 on end
199 end
200 chip drivers/usb/acpi
201 register "desc" = ""USB3 Type-C""
202 register "type" = "UPC_TYPE_C_USB2_SS"
203 register "group" = "ACPI_PLD_GROUP(0, 3)"
204 device usb 3.2 on end
205 end
206 chip drivers/usb/acpi
207 register "desc" = ""USB3 Type-C""
208 register "type" = "UPC_TYPE_C_USB2_SS"
209 register "group" = "ACPI_PLD_GROUP(0, 3)"
210 device usb 3.3 on end
211 end
212 end
213 end
214 end
215 device ref south_xdci off end
216 device ref thermal on end
217 device ref cio off end
218 device ref i2c0 on
219 chip drivers/i2c/hid
220 register "generic.name" = ""TPL0""
221 register "generic.hid" = ""ELAN2259""
222 register "generic.desc" = ""ELAN Touchscreen""
223 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
224 register "generic.device_present_gpio" = "GPP_B15"
225 register "hid_desc_reg_offset" = "0x01"
226 device i2c 0x10 on end
227 end
228 end
229 device ref i2c1 on
230 chip drivers/i2c/hid
231 register "generic.name" = ""TPD0""
232 register "generic.hid" = ""SYN1B7F""
233 register "generic.desc" = ""Synaptics Touchpad""
234 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_B3_IRQ)"
235# register "generic.wake" = "GPE0_DW2_16" # FIXME: Use EC's GPE?
Matt DeVillier2cf52d82022-09-01 15:09:24 -0500236 register "generic.detect" = "1"
Benjamin Doron289a67d2019-09-22 17:33:12 +1000237 register "hid_desc_reg_offset" = "0x20"
238 device i2c 0x2c on end
239 end
240 chip drivers/i2c/hid
241 register "generic.name" = ""TPD1""
242 register "generic.hid" = ""ELAN0501""
243 register "generic.desc" = ""ELAN Touchpad""
244 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
Matt DeVillier2cf52d82022-09-01 15:09:24 -0500245 register "generic.detect" = "1"
Benjamin Doron289a67d2019-09-22 17:33:12 +1000246 register "hid_desc_reg_offset" = "0x01"
247 device i2c 0x15 on end
248 end
249 end
250 device ref heci1 on end
251 device ref sata on
252 register "SataMode" = "SATA_AHCI"
253 register "SataSalpSupport" = "1"
254 register "SataPortsEnable[1]" = "1" # HDD; BIT1 in 92h-93h
255 register "SataPortsEnable[2]" = "1" # ODD; BIT2 in 92h-93h
256 end
257 device ref uart2 on end
258 # Board has no GPIO expander on I2C4 (despite SetupUtility claim that it does - this would be static text)
259 device ref pcie_rp1 on
260 register "PcieRpEnable[0]" = "1"
261 register "PcieRpAdvancedErrorReporting[0]" = "1"
262 register "PcieRpLtrEnable[0]" = "1"
263 register "PcieRpClkReqSupport[0]" = "1"
264 register "PcieRpClkReqNumber[0]" = "0"
265 register "PcieRpMaxPayload[0]" = "RpMaxPayload_256"
266 end # PCI Express Port 1 (dGPU; x4)
267 device ref pcie_rp7 on
268 register "PcieRpEnable[6]" = "1"
269 register "PcieRpAdvancedErrorReporting[6]" = "1"
270 register "PcieRpLtrEnable[6]" = "1"
271 register "PcieRpClkReqSupport[6]" = "1"
272 register "PcieRpClkReqNumber[6]" = "3"
273 register "PcieRpMaxPayload[6]" = "RpMaxPayload_256"
274 end # PCI Express Port 7 (NGFF; x2)
275 device ref pcie_rp9 on
276 register "PcieRpEnable[8]" = "1"
277 register "PcieRpAdvancedErrorReporting[8]" = "1"
278 register "PcieRpLtrEnable[8]" = "1"
279 register "PcieRpClkReqSupport[8]" = "1"
280 register "PcieRpClkReqNumber[8]" = "1"
281 register "PcieRpMaxPayload[8]" = "RpMaxPayload_256"
282 end # PCI Express Port 9 (LAN)
283 device ref pcie_rp10 on
284 register "PcieRpEnable[9]" = "1"
285 register "PcieRpAdvancedErrorReporting[9]" = "1"
286 register "PcieRpLtrEnable[9]" = "1"
287 register "PcieRpClkReqSupport[9]" = "1"
288 register "PcieRpClkReqNumber[9]" = "2"
289 register "PcieRpMaxPayload[9]" = "RpMaxPayload_256"
290 # ASPM L0s is broken/unsupported on Qualcomm Atheros QCA6174 (AER: corrected errors)
291 register "pcie_rp_aspm[9]" = "AspmL1"
292 end # PCI Express Port 10 (WLAN)
293 # Although vendor's platform NVS area shows SCS is enabled, the SD card reader is actually connected over USB
294 device ref lpc_espi on
295 register "lpc_iod" = "0x0010" # 80h-81h; ComB: 2F8h-2FFh (COM 2)
296 register "lpc_ioe" = "LPC_IOE_COMA_EN | LPC_IOE_COMB_EN | LPC_IOE_KBC_60_64
297 | LPC_IOE_EC_62_66 | LPC_IOE_SUPERIO_2E_2F | LPC_IOE_EC_4E_4F" # 82h-83h
298 register "gen3_dec" = "0x00040069" # 8Ch-8Fh; EC (sideband): Port 68h/6Ch
299 register "gen4_dec" = "0x000c1201" # 90h-93h; EC (index): Port 1200h
300
301 # EC/KBC requires continuous mode
302 register "serirq_mode" = "SERIRQ_CONTINUOUS"
303 end
304 device ref p2sb on end
305 device ref pmc on
306 # Note that GPE events called out in ASL code rely on this
307 # route. i.e. If this route changes then the affected GPE
308 # offset bits also need to be changed.
309 register "gpe0_dw0" = "GPP_C" # 3:0 in pwrmbase+0120h
310 register "gpe0_dw1" = "GPP_D" # 7:4 in pwrmbase+0120h
311 register "gpe0_dw2" = "GPP_E" # 11:8 in pwrmbase+0120h
312
313 # Enable S0ix
Felix Singer743242b2023-06-16 01:33:25 +0200314 register "s0ix_enable" = true
Benjamin Doron289a67d2019-09-22 17:33:12 +1000315
316 register "PmConfigSlpS3MinAssert" = "SLP_S3_MIN_ASSERT_50MS" # 11:10 in A4h-A7h
317 register "PmConfigSlpS4MinAssert" = "SLP_S4_MIN_ASSERT_4S" # 5:4 in A4h-A7h
318 register "PmConfigSlpSusMinAssert" = "SLP_SUS_MIN_ASSERT_4S" # 19:18 in pmbase+0018h
319 register "PmConfigSlpAMinAssert" = "SLP_A_MIN_ASSERT_2S" # 17:16 in pmbase+0018h
320 end
321 device ref hda on
322 register "DspEnable" = "1"
323 # PchHdaDspEndpointDmic is only to be returned to reference code
324 # DXE phase as HOB, used to select blob for NHLT
325 end
326 device ref smbus on end
327 device ref fast_spi on end
328 device ref tracehub off end
329 end
330 chip drivers/crb
331 device mmio 0xfed40000 on end
332 end
333end