Vadim Bendebury | 0b341b3 | 2014-04-23 11:09:44 -0700 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright 2014 Google Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
| 20 | bootblock-y += bootblock.c |
Vadim Bendebury | db3e2f0 | 2014-04-09 19:23:54 -0700 | [diff] [blame] | 21 | bootblock-y += clock.c |
Furquan Shaikh | 9d91aba | 2014-04-10 20:35:05 -0700 | [diff] [blame] | 22 | bootblock-y += gpio.c |
Vadim Bendebury | 0e2d9b6 | 2014-05-01 19:37:18 -0700 | [diff] [blame] | 23 | bootblock-$(CONFIG_SPI_FLASH) += spi.c |
Marc Jones | 017287a | 2014-12-29 16:52:59 -0700 | [diff] [blame] | 24 | bootblock-y += timer.c |
Vadim Bendebury | 11c4c92 | 2014-04-23 14:26:01 -0700 | [diff] [blame] | 25 | bootblock-$(CONFIG_DRIVERS_UART) += uart.c |
Furquan Shaikh | 7657057 | 2014-03-19 14:29:48 -0700 | [diff] [blame] | 26 | |
Vadim Bendebury | db3e2f0 | 2014-04-09 19:23:54 -0700 | [diff] [blame] | 27 | romstage-y += clock.c |
Furquan Shaikh | 9d91aba | 2014-04-10 20:35:05 -0700 | [diff] [blame] | 28 | romstage-y += gpio.c |
Vadim Bendebury | 0e2d9b6 | 2014-05-01 19:37:18 -0700 | [diff] [blame] | 29 | romstage-$(CONFIG_SPI_FLASH) += spi.c |
Marc Jones | 017287a | 2014-12-29 16:52:59 -0700 | [diff] [blame] | 30 | romstage-y += timer.c |
Vadim Bendebury | 11c4c92 | 2014-04-23 14:26:01 -0700 | [diff] [blame] | 31 | romstage-$(CONFIG_DRIVERS_UART) += uart.c |
Vadim Bendebury | 15c98b0 | 2014-05-01 14:45:56 -0700 | [diff] [blame] | 32 | romstage-y += cbmem.c |
Furquan Shaikh | 7657057 | 2014-03-19 14:29:48 -0700 | [diff] [blame] | 33 | |
Vadim Bendebury | 15c98b0 | 2014-05-01 14:45:56 -0700 | [diff] [blame] | 34 | ramstage-y += cbmem.c |
Vadim Bendebury | db3e2f0 | 2014-04-09 19:23:54 -0700 | [diff] [blame] | 35 | ramstage-y += clock.c |
Furquan Shaikh | 9d91aba | 2014-04-10 20:35:05 -0700 | [diff] [blame] | 36 | ramstage-y += gpio.c |
Vadim Bendebury | 41a5d0d | 2014-05-13 17:47:57 -0700 | [diff] [blame] | 37 | ramstage-y += soc.c |
Vadim Bendebury | 0e2d9b6 | 2014-05-01 19:37:18 -0700 | [diff] [blame] | 38 | ramstage-$(CONFIG_SPI_FLASH) += spi.c |
Vadim Bendebury | f4b209f | 2014-04-09 19:23:04 -0700 | [diff] [blame] | 39 | ramstage-y += timer.c |
Vadim Bendebury | 11c4c92 | 2014-04-23 14:26:01 -0700 | [diff] [blame] | 40 | ramstage-$(CONFIG_DRIVERS_UART) += uart.c |
Julius Werner | 028cba9 | 2014-05-30 18:01:44 -0700 | [diff] [blame] | 41 | ramstage-y += usb.c |
Vadim Bendebury | b1709bd | 2014-04-07 15:26:39 -0700 | [diff] [blame] | 42 | |
Julius Werner | 73d1ed6 | 2014-10-20 13:20:49 -0700 | [diff] [blame^] | 43 | INCLUDES += -Isrc/soc/qualcomm/ipq806x/include/ |
| 44 | |
Vadim Bendebury | 9cb70ae | 2014-04-07 18:59:53 -0700 | [diff] [blame] | 45 | ifeq ($(CONFIG_USE_BLOBS),y) |
Vadim Bendebury | b1709bd | 2014-04-07 15:26:39 -0700 | [diff] [blame] | 46 | |
Vadim Bendebury | 9cb70ae | 2014-04-07 18:59:53 -0700 | [diff] [blame] | 47 | # Generate the actual coreboot bootblock code |
| 48 | $(objcbfs)/bootblock.raw: $(objcbfs)/bootblock.elf |
Vadim Bendebury | b1709bd | 2014-04-07 15:26:39 -0700 | [diff] [blame] | 49 | @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" |
Vadim Bendebury | 9cb70ae | 2014-04-07 18:59:53 -0700 | [diff] [blame] | 50 | $(OBJCOPY_bootblock) -O binary $< $@.tmp |
Vadim Bendebury | b1709bd | 2014-04-07 15:26:39 -0700 | [diff] [blame] | 51 | @mv $@.tmp $@ |
Vadim Bendebury | 9cb70ae | 2014-04-07 18:59:53 -0700 | [diff] [blame] | 52 | |
| 53 | # Add MBN header to allow SBL3 to start coreboot bootblock |
| 54 | $(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw |
| 55 | @printf " ADD MBN $(subst $(obj)/,,$(@))\n" |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 56 | ./util/ipqheader/ipqheader.py $(call loadaddr,bootblock) $< $@.tmp |
Vadim Bendebury | 9cb70ae | 2014-04-07 18:59:53 -0700 | [diff] [blame] | 57 | @mv $@.tmp $@ |
| 58 | |
| 59 | # Create a complete bootblock which will start up the system |
Vadim Bendebury | e83c80c | 2014-04-15 14:42:30 -0700 | [diff] [blame] | 60 | $(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_BLOB)) \ |
Vadim Bendebury | 9cb70ae | 2014-04-07 18:59:53 -0700 | [diff] [blame] | 61 | $(objcbfs)/bootblock.mbn |
| 62 | @printf " CAT $(subst $(obj)/,,$(@))\n" |
| 63 | @cat $^ > $@.tmp |
| 64 | @mv $@.tmp $@ |
| 65 | |
Vadim Bendebury | b1709bd | 2014-04-07 15:26:39 -0700 | [diff] [blame] | 66 | endif |
Furquan Shaikh | 75b4beb | 2014-04-10 20:53:32 -0700 | [diff] [blame] | 67 | |
Furquan Shaikh | 9d91aba | 2014-04-10 20:35:05 -0700 | [diff] [blame] | 68 | CPPFLAGS_common += -Isrc/soc/qualcomm/ipq806x/include |