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review.coreboot.org / coreboot / 730a043fb6cb4dd3cb5af8f8640365727b598648 / . / src / northbridge / amd / amdmct / wrappers / mcti.h
blob: 762ef11f44b6027fc705cbc8a392bb17dd5f3a4f [file] [log] [blame]
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]1/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +0000[diff] [blame]2 * This file is part of the coreboot project.
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]3 *
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
Timothy Pearson730a0432015-10-16 13:51:51 -0500[diff] [blame^]5 * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]15 */
16
17
18#define SERVER 0
Elyes HAOUAS1631c882014-07-23 00:01:34 +0200[diff] [blame]19#define DESKTOP 1
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]20//#define MOBILE 2
21#define REV_F 0
22#define REV_DR 1
Elyes HAOUAS1631c882014-07-23 00:01:34 +0200[diff] [blame]23#define REV_FDR 2
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]24
25
26/*----------------------------------------------------------------------------
27COMMENT OUT ALL BUT 1
28----------------------------------------------------------------------------*/
Elyes HAOUAS1631c882014-07-23 00:01:34 +0200[diff] [blame]29//#define BUILD_VERSION REV_F /*BIOS supports rev F only*/
30//#define BUILD_VERSION REV_DR /*BIOS supports rev 10 only*/
31//#define BUILD_VERSION REV_FDR /*BIOS supports both rev F and 10*/
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]32
33/*----------------------------------------------------------------------------
34COMMENT OUT ALL BUT 1
35----------------------------------------------------------------------------*/
36#ifndef SYSTEM_TYPE
37#define SYSTEM_TYPE SERVER
38//#define SYSTEM_TYPE DESKTOP
39//#define SYSTEM_TYPE MOBILE
40#endif
41
42/*----------------------------------------------------------------------------
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]43UPDATE AS NEEDED
44----------------------------------------------------------------------------*/
Kerry She99cfa1e2010-08-30 07:31:31 +0000[diff] [blame]45#ifndef MAX_NODES_SUPPORTED
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]46#define MAX_NODES_SUPPORTED 8
Kerry She99cfa1e2010-08-30 07:31:31 +0000[diff] [blame]47#endif
48
49#ifndef MAX_DIMMS_SUPPORTED
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]50#define MAX_DIMMS_SUPPORTED 8
Kerry She99cfa1e2010-08-30 07:31:31 +0000[diff] [blame]51#endif
52
53#ifndef MAX_CS_SUPPORTED
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]54#define MAX_CS_SUPPORTED 8
Kerry She99cfa1e2010-08-30 07:31:31 +0000[diff] [blame]55#endif
56
Marc Jones471f1032011-06-03 19:59:52 +0000[diff] [blame]57#ifndef MCT_DIMM_SPARE_NO_WARM
58#define MCT_DIMM_SPARE_NO_WARM 0
59#endif
60
61#ifndef MEM_MAX_LOAD_FREQ
Timothy Pearson730a0432015-10-16 13:51:51 -0500[diff] [blame^]62#if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */
63 #define MEM_MAX_LOAD_FREQ 933
64 #define MEM_MIN_PLATFORM_FREQ_FAM10 400
65 #define MEM_MIN_PLATFORM_FREQ_FAM15 333
66#else /* AMD_FAM10_DDR2 */
67 #define MEM_MAX_LOAD_FREQ 400
68 #define MEM_MIN_PLATFORM_FREQ_FAM10 200
69 /* DDR2 not available on Family 15h */
70 #define MEM_MIN_PLATFORM_FREQ_FAM15 0
Marc Jones471f1032011-06-03 19:59:52 +0000[diff] [blame]71#endif
72#endif
73
Marc Jones8ae8c882007-12-19 01:32:08 +0000[diff] [blame]74#define MCT_TRNG_KEEPOUT_START 0x00000C00
75#define MCT_TRNG_KEEPOUT_END 0x00000CFF