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Marc Jones8ae8c882007-12-19 01:32:08 +00001/*
Stefan Reinauer7e61e452008-01-18 10:35:56 +00002 * This file is part of the coreboot project.
Marc Jones8ae8c882007-12-19 01:32:08 +00003 *
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
Timothy Pearson730a0432015-10-16 13:51:51 -05005 * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
Marc Jones8ae8c882007-12-19 01:32:08 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Marc Jones8ae8c882007-12-19 01:32:08 +000015 */
16
17#ifndef CPU_AMD_MODEL_10XXX_MSR_H
18#define CPU_AMD_MODEL_10XXX_MSR_H
19
Patrick Georgi3d5bb232010-05-09 21:15:13 +000020#include <cpu/x86/msr.h>
21
Rudolf Marekb5b3b3b2011-07-02 16:36:17 +020022#define SMM_BASE_MSR 0xC0010111
23#define SMM_ADDR_MSR 0xC0010112
24#define SMM_MASK_MSR 0xC0010113
25
Marc Jones8ae8c882007-12-19 01:32:08 +000026#define HWCR_MSR 0xC0010015
27#define NB_CFG_MSR 0xC001001f
28#define LS_CFG_MSR 0xC0011020
29#define IC_CFG_MSR 0xC0011021
30#define DC_CFG_MSR 0xC0011022
31#define BU_CFG_MSR 0xC0011023
Timothy Pearson730a0432015-10-16 13:51:51 -050032#define FP_CFG_MSR 0xC0011028
33#define DE_CFG_MSR 0xC0011029
Marco Schmidtc263b442009-06-06 11:21:52 +000034#define BU_CFG2_MSR 0xC001102A
Timothy Pearson730a0432015-10-16 13:51:51 -050035#define BU_CFG3_MSR 0xC001102B
36#define EX_CFG_MSR 0xC001102C
37#define LS_CFG2_MSR 0xC001102D
38#define IBS_OP_DATA3_MSR 0xC0011037
Marc Jones8ae8c882007-12-19 01:32:08 +000039
40#define CPU_ID_FEATURES_MSR 0xC0011004
41#define CPU_ID_HYPER_EXT_FEATURES 0xC001100d
42#define LOGICAL_CPUS_NUM_MSR 0xC001100d
Paul Menzel8048e742013-05-13 18:22:23 +020043#define CPU_ID_EXT_FEATURES_MSR 0xC0011005
Marc Jones8ae8c882007-12-19 01:32:08 +000044
Marc Jones8ae8c882007-12-19 01:32:08 +000045#endif /* CPU_AMD_MODEL_10XXX_MSR_H */