Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2010 Win Enterprises, Inc (anishp@win-ent.com) |
| 6 | * |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 18 | #include <stdint.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 19 | #include <stdlib.h> |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 20 | #include <device/pci_def.h> |
| 21 | #include <arch/io.h> |
| 22 | #include <device/pnp_def.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 23 | #include <console/console.h> |
Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 24 | #include <lib.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 25 | #include <cpu/x86/bist.h> |
| 26 | #include <cpu/x86/msr.h> |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 27 | #include <cpu/amd/lxdef.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 28 | #include <southbridge/amd/cs5536/cs5536.h> |
Patrick Georgi | 9bd9a90 | 2010-11-20 10:31:00 +0000 | [diff] [blame] | 29 | #include <spd.h> |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 30 | #include "southbridge/amd/cs5536/early_smbus.c" |
| 31 | #include "southbridge/amd/cs5536/early_setup.c" |
Edward O'Callaghan | beb0f26 | 2014-04-29 13:09:50 +1000 | [diff] [blame] | 32 | #include <superio/winbond/common/winbond.h> |
| 33 | #include <superio/winbond/w83627hf/w83627hf.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 34 | #include <northbridge/amd/lx/raminit.h> |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 35 | |
Uwe Hermann | 57b2ff8 | 2010-11-21 17:29:59 +0000 | [diff] [blame] | 36 | #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) |
| 37 | |
Christian Gmeiner | c4e07bb | 2013-06-04 17:34:35 +0200 | [diff] [blame] | 38 | int spd_read_byte(unsigned int device, unsigned int address) |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 39 | { |
| 40 | return smbus_read_byte(device, address); |
| 41 | } |
| 42 | |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 43 | #include "northbridge/amd/lx/pll_reset.c" |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 44 | #include "lib/generic_sdram.c" |
Kyösti Mälkki | 7916f4c | 2012-02-09 16:07:41 +0200 | [diff] [blame] | 45 | #include "cpu/amd/geode_lx/cpureginit.c" |
| 46 | #include "cpu/amd/geode_lx/syspreinit.c" |
| 47 | #include "cpu/amd/geode_lx/msrinit.c" |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 48 | |
Aaron Durbin | a0a3727 | 2014-08-14 08:35:11 -0500 | [diff] [blame] | 49 | #include <cpu/intel/romstage.h> |
Stefan Reinauer | 9839cbd | 2010-04-21 20:06:10 +0000 | [diff] [blame] | 50 | void main(unsigned long bist) |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 51 | { |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 52 | |
| 53 | static const struct mem_controller memctrl[] = { |
Uwe Hermann | 6dc92f0 | 2010-11-21 11:36:03 +0000 | [diff] [blame] | 54 | {.channel0 = {DIMM0, DIMM1}} |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 55 | }; |
| 56 | |
| 57 | SystemPreInit(); |
| 58 | msr_init(); |
| 59 | |
| 60 | cs5536_early_setup(); |
| 61 | |
| 62 | /* Note: must do this AFTER the early_setup! It is counting on some |
| 63 | * early MSR setup for CS5536. |
| 64 | */ |
| 65 | w83627hf_set_clksel_48(SERIAL_DEV); |
Edward O'Callaghan | beb0f26 | 2014-04-29 13:09:50 +1000 | [diff] [blame] | 66 | winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 67 | console_init(); |
| 68 | |
Stefan Reinauer | 9839cbd | 2010-04-21 20:06:10 +0000 | [diff] [blame] | 69 | /* Halt if there was a built in self test failure */ |
| 70 | report_bist_failure(bist); |
| 71 | |
Patrick Georgi | 7dc2864 | 2012-07-13 19:06:22 +0200 | [diff] [blame] | 72 | pll_reset(); |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 73 | |
Edwin Beasant | f333ba0 | 2010-06-10 15:24:57 +0000 | [diff] [blame] | 74 | cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 75 | |
| 76 | sdram_initialize(1, memctrl); |
| 77 | |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 78 | /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */ |
Anish K. Patel | 3a54ac9 | 2010-02-24 16:36:56 +0000 | [diff] [blame] | 79 | } |