Jonathan A. Kollasch | ebbfbd5 | 2011-08-05 14:43:08 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com> |
| 5 | * Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Jonathan A. Kollasch | ebbfbd5 | 2011-08-05 14:43:08 -0500 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | /* |
| 18 | * ISA portions taken from QEMU acpi-dsdt.dsl. |
| 19 | */ |
| 20 | |
| 21 | DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "CB-DSDT ", 1) |
| 22 | { |
| 23 | #include "northbridge/amd/amdk8/util.asl" |
| 24 | |
| 25 | /* For now only define 2 power states: |
| 26 | * - S0 which is fully on |
| 27 | * - S5 which is soft off |
| 28 | * Any others would involve declaring the wake up methods. |
| 29 | */ |
| 30 | Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) |
| 31 | Name (\_S5, Package () { 0x07, 0x00, 0x00, 0x00 }) |
| 32 | |
| 33 | Name (PICM, 0x00) |
| 34 | Method (_PIC, 1, Serialized) { |
| 35 | Store (Arg0, PICM) |
| 36 | } |
| 37 | |
| 38 | /* Root of the bus hierarchy */ |
| 39 | Scope (\_SB) |
| 40 | { |
| 41 | /* Top PCI device (CK804) */ |
| 42 | Device (PCI0) |
| 43 | { |
| 44 | Name (_HID, EisaId ("PNP0A03")) |
| 45 | Name (_ADR, 0x00) |
| 46 | Name (_UID, 0x00) |
| 47 | Name (_BBN, 0x00) |
| 48 | |
| 49 | External (BUSN) |
| 50 | External (MMIO) |
| 51 | External (PCIO) |
| 52 | External (SBLK) |
| 53 | External (TOM1) |
| 54 | External (HCLK) |
| 55 | External (SBDN) |
| 56 | External (HCDN) |
| 57 | |
| 58 | Method (_CRS, 0, NotSerialized) |
| 59 | { |
| 60 | Name (BUF0, ResourceTemplate () |
| 61 | { |
| 62 | IO (Decode16, |
| 63 | 0x0CF8, // Address Range Minimum |
| 64 | 0x0CF8, // Address Range Maximum |
| 65 | 0x01, // Address Alignment |
| 66 | 0x08, // Address Length |
| 67 | ) |
| 68 | WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 69 | 0x0000, // Address Space Granularity |
| 70 | 0x0000, // Address Range Minimum |
| 71 | 0x0CF7, // Address Range Maximum |
| 72 | 0x0000, // Address Translation Offset |
| 73 | 0x0CF8, // Address Length |
| 74 | ,, , TypeStatic) |
| 75 | }) |
| 76 | /* Methods bellow use SSDT to get actual MMIO regs |
| 77 | The IO ports are from 0xd00, optionally an VGA, |
| 78 | otherwise the info from MMIO is used. |
| 79 | \_SB.GXXX(node, link) |
| 80 | */ |
| 81 | Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1) |
| 82 | Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2) |
| 83 | Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3) |
| 84 | Return (Local3) |
| 85 | } |
| 86 | |
| 87 | #include "southbridge/nvidia/ck804/acpi/ck804.asl" |
| 88 | |
| 89 | /* PCI Routing Table */ |
| 90 | Name (_PRT, Package () { |
| 91 | Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LLAS, 0x00 }, |
| 92 | Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LLAS, 0x00 }, |
| 93 | Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LUOH, 0x00 }, |
| 94 | Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LUEH, 0x00 }, |
| 95 | Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LAUD, 0x00 }, |
| 96 | Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LMOD, 0x00 }, |
| 97 | Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LPA0, 0x00 }, |
| 98 | Package (0x04) { 0x0007FFFF, 0x00, \_SB.PCI0.LSA0, 0x00 }, |
| 99 | Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LSA1, 0x00 }, |
| 100 | |
Jonathan A. Kollasch | ebbfbd5 | 2011-08-05 14:43:08 -0500 | [diff] [blame] | 101 | Package (0x04) { 0x000AFFFF, 0x00, \_SB.PCI0.LEMA, 0x00 }, |
| 102 | |
| 103 | Package (0x04) { 0x000BFFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, |
| 104 | Package (0x04) { 0x000BFFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, |
| 105 | Package (0x04) { 0x000BFFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, |
| 106 | Package (0x04) { 0x000BFFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, |
| 107 | |
| 108 | Package (0x04) { 0x000CFFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, |
| 109 | Package (0x04) { 0x000CFFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, |
| 110 | Package (0x04) { 0x000CFFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, |
| 111 | Package (0x04) { 0x000CFFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, |
| 112 | |
| 113 | Package (0x04) { 0x000DFFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, |
| 114 | Package (0x04) { 0x000DFFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, |
| 115 | Package (0x04) { 0x000DFFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, |
| 116 | Package (0x04) { 0x000DFFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, |
| 117 | |
| 118 | Package (0x04) { 0x000EFFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, |
| 119 | Package (0x04) { 0x000EFFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, |
| 120 | Package (0x04) { 0x000EFFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, |
| 121 | Package (0x04) { 0x000EFFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, |
| 122 | }) |
| 123 | |
| 124 | Device (PCIC) |
| 125 | { |
| 126 | Name (_ADR, 0x00090000) |
| 127 | Name (_UID, 0x00) |
| 128 | Name (_PRT, Package () { |
Jonathan A. Kollasch | 6197814 | 2015-06-23 10:00:41 -0500 | [diff] [blame] | 129 | /* AGR slot "AGP1" */ |
| 130 | Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, |
| 131 | Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, |
| 132 | Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, |
| 133 | Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, |
| 134 | |
| 135 | /* PCI slot "PCI1" */ |
| 136 | Package (0x04) { 0x0007FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, |
| 137 | Package (0x04) { 0x0007FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, |
| 138 | Package (0x04) { 0x0007FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, |
| 139 | /* Not sure INTD is right, but this is what the OEM BIOS does. */ |
| 140 | Package (0x04) { 0x0007FFFF, 0x03, \_SB.PCI0.LNKE, 0x00 }, |
| 141 | |
| 142 | /* PCI slot "PCI2" */ |
| 143 | Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, |
| 144 | Package (0x04) { 0x0008FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, |
| 145 | Package (0x04) { 0x0008FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, |
| 146 | Package (0x04) { 0x0008FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, |
| 147 | |
| 148 | /* PCI slot "PCI3" */ |
| 149 | Package (0x04) { 0x0009FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, |
| 150 | Package (0x04) { 0x0009FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, |
| 151 | Package (0x04) { 0x0009FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, |
| 152 | Package (0x04) { 0x0009FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, |
Jonathan A. Kollasch | ebbfbd5 | 2011-08-05 14:43:08 -0500 | [diff] [blame] | 153 | }) |
| 154 | } |
| 155 | |
| 156 | /* 2:00 PCIe x1 */ |
| 157 | Device (PEX1) |
| 158 | { |
| 159 | Name (_ADR, 0x000d0000) |
| 160 | Name (_UID, 0x00) |
| 161 | } |
| 162 | |
| 163 | /* 3:00 PCIe x16 */ |
| 164 | Device (PEX0) |
| 165 | { |
| 166 | Name (_ADR, 0x000e0000) |
| 167 | Name (_UID, 0x00) |
| 168 | } |
| 169 | |
| 170 | Device (LPC) { |
| 171 | Name (_HID, EisaId ("PNP0A05")) |
| 172 | Name (_ADR, 0x00010000) |
| 173 | |
| 174 | OperationRegion (CF44, PCI_Config, 0x44, 0x04) |
| 175 | Field (CF44, ByteAcc, NoLock, Preserve) |
| 176 | { |
| 177 | ETBA, 32, |
| 178 | } |
| 179 | |
| 180 | /* PS/2 keyboard (seems to be important for WinXP install) */ |
| 181 | Device (KBD) |
| 182 | { |
| 183 | Name (_HID, EisaId ("PNP0303")) |
| 184 | Method (_STA, 0, NotSerialized) |
| 185 | { |
| 186 | Return (0x0f) |
| 187 | } |
| 188 | Method (_CRS, 0, NotSerialized) |
| 189 | { |
| 190 | Name (TMP, ResourceTemplate () { |
| 191 | IO (Decode16, 0x0060, 0x0060, 0x01, 0x01) |
| 192 | IO (Decode16, 0x0064, 0x0064, 0x01, 0x01) |
| 193 | IRQNoFlags () {1} |
| 194 | }) |
| 195 | Return (TMP) |
| 196 | } |
| 197 | } |
| 198 | |
| 199 | /* PS/2 mouse */ |
| 200 | Device (MOU) |
| 201 | { |
| 202 | Name (_HID, EisaId ("PNP0F13")) |
| 203 | Method (_STA, 0, NotSerialized) |
| 204 | { |
| 205 | Return (0x0f) |
| 206 | } |
| 207 | Method (_CRS, 0, NotSerialized) |
| 208 | { |
| 209 | Name (TMP, ResourceTemplate () { |
| 210 | IRQNoFlags () {12} |
| 211 | }) |
| 212 | Return (TMP) |
| 213 | } |
| 214 | } |
| 215 | |
| 216 | /* Parallel port */ |
| 217 | Device (LP0) |
| 218 | { |
| 219 | Name (_HID, EisaId ("PNP0400")) // "PNP0401" for ECP |
| 220 | Method (_STA, 0, NotSerialized) |
| 221 | { |
| 222 | Return (0x0f) |
| 223 | } |
| 224 | Method (_CRS, 0, NotSerialized) |
| 225 | { |
| 226 | Name (TMP, ResourceTemplate () { |
| 227 | FixedIO (0x0378, 0x10) |
| 228 | IRQNoFlags () {7} |
| 229 | }) |
| 230 | Return (TMP) |
| 231 | } |
| 232 | } |
| 233 | |
| 234 | /* Floppy controller */ |
| 235 | Device (FDC0) |
| 236 | { |
| 237 | Name (_HID, EisaId ("PNP0700")) |
| 238 | Method (_STA, 0, NotSerialized) |
| 239 | { |
| 240 | Return (0x0f) |
| 241 | } |
| 242 | Method (_CRS, 0, NotSerialized) |
| 243 | { |
| 244 | Name (BUF0, ResourceTemplate () { |
| 245 | FixedIO (0x03F0, 0x08) |
| 246 | IRQNoFlags () {6} |
| 247 | DMA (Compatibility, NotBusMaster, Transfer8) {2} |
| 248 | }) |
| 249 | Return (BUF0) |
| 250 | } |
| 251 | } |
| 252 | #if 0 |
| 253 | Device (HPET) |
| 254 | { |
| 255 | Name (_HID, EisaId ("PNP0103")) |
| 256 | Name (CRS, ResourceTemplate () |
| 257 | { |
| 258 | Memory32Fixed (ReadOnly, |
| 259 | 0x00000000, |
| 260 | 0x00001000, |
| 261 | _Y02) |
| 262 | }) |
| 263 | Method (_STA, 0, NotSerialized) |
| 264 | { |
| 265 | Return (0x0F) |
| 266 | } |
| 267 | Method (_CRS, 0, NotSerialized) |
| 268 | { |
| 269 | CreateDWordField (CRS, \_SB.PCI0.LPC.HPET._Y02._BAS, HPT) |
| 270 | Store (ETBA, HPT) |
| 271 | Return (CRS) |
| 272 | } |
Patrick Georgi | 472efa6 | 2012-02-16 20:44:20 +0100 | [diff] [blame] | 273 | |
Jonathan A. Kollasch | ebbfbd5 | 2011-08-05 14:43:08 -0500 | [diff] [blame] | 274 | } |
| 275 | #endif |
| 276 | } |
| 277 | } |
| 278 | } |
| 279 | } |