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Yinghai Luc34e3ab2006-10-12 00:58:20 +00001#include <console/console.h>
2#include <device/pci.h>
3#include <device/pci_ids.h>
4#include <string.h>
5#include <stdint.h>
Stefan Reinauer9a16e3e2010-03-29 14:45:36 +00006#include <cpu/amd/multicore.h>
Yinghai Luc34e3ab2006-10-12 00:58:20 +00007
8#include <cpu/amd/amdk8_sysconf.h>
9
Carl-Daniel Hailfinger2ee67792008-10-01 12:52:52 +000010#include <stdlib.h>
Yinghai Luc34e3ab2006-10-12 00:58:20 +000011#include "mb_sysconf.h"
12
13// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
14struct mb_sysconf_t mb_sysconf;
15
Paul Menzel6a4e9b52013-10-18 09:42:55 +020016static unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
17 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
18 0x0000ff0, // SB chain m
19 0x0000000, // HTX
20 0x0000100, // co processor on socket 1
Yinghai Luc34e3ab2006-10-12 00:58:20 +000021// 0x0000ff0,
22// 0x0000ff0,
23// 0x0000ff0,
24// 0x0000ff0,
25// 0x0000ff0
26};
Paul Menzel6a4e9b52013-10-18 09:42:55 +020027
28static unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
Yinghai Luc34e3ab2006-10-12 00:58:20 +000029 0x20202020,
30 0x20202020,
Paul Menzel6a4e9b52013-10-18 09:42:55 +020031 0x20202020,
Yinghai Luc34e3ab2006-10-12 00:58:20 +000032// 0x20202020,
33// 0x20202020,
34// 0x20202020,
35// 0x20202020,
36// 0x20202020,
37};
38
Yinghai Luc34e3ab2006-10-12 00:58:20 +000039static unsigned get_bus_conf_done = 0;
40
41static unsigned get_hcid(unsigned i)
42{
Paul Menzel6a4e9b52013-10-18 09:42:55 +020043 unsigned id = 0;
Yinghai Luc34e3ab2006-10-12 00:58:20 +000044
Paul Menzel6a4e9b52013-10-18 09:42:55 +020045 unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
Yinghai Luc34e3ab2006-10-12 00:58:20 +000046
Paul Menzel6a4e9b52013-10-18 09:42:55 +020047 unsigned devn = sysconf.hcdn[i] & 0xff;
Yinghai Luc34e3ab2006-10-12 00:58:20 +000048
Paul Menzel6a4e9b52013-10-18 09:42:55 +020049 device_t dev;
Yinghai Luc34e3ab2006-10-12 00:58:20 +000050
Paul Menzel6a4e9b52013-10-18 09:42:55 +020051 dev = dev_find_slot(busn, PCI_DEVFN(devn, 0));
Yinghai Luc34e3ab2006-10-12 00:58:20 +000052
Paul Menzel6a4e9b52013-10-18 09:42:55 +020053 switch (dev->device) {
54 case 0x7458: //8132
55 id = 1;
Yinghai Luc34e3ab2006-10-12 00:58:20 +000056 break;
Paul Menzel6a4e9b52013-10-18 09:42:55 +020057 case 0x7454: //8151
58 id = 2;
59 break;
60 case 0x7450: //8131
61 id = 3;
62 break;
63 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +000064
Paul Menzel6a4e9b52013-10-18 09:42:55 +020065 // we may need more way to find out hcid: subsystem id? GPIO read ?
Yinghai Luc34e3ab2006-10-12 00:58:20 +000066
Paul Menzel6a4e9b52013-10-18 09:42:55 +020067 // we need use id for 1. bus num, 2. mptable, 3. acpi table
Yinghai Luc34e3ab2006-10-12 00:58:20 +000068
Paul Menzel6a4e9b52013-10-18 09:42:55 +020069 return id;
Yinghai Luc34e3ab2006-10-12 00:58:20 +000070}
71
72void get_bus_conf(void)
73{
74
75 unsigned apicid_base;
76
Paul Menzel6a4e9b52013-10-18 09:42:55 +020077 device_t dev;
Yinghai Luc34e3ab2006-10-12 00:58:20 +000078 int i, j;
79 struct mb_sysconf_t *m;
80
Paul Menzel6a4e9b52013-10-18 09:42:55 +020081 if (get_bus_conf_done == 1)
82 return; //do it only once
Yinghai Luc34e3ab2006-10-12 00:58:20 +000083
84 get_bus_conf_done = 1;
85
86 sysconf.mb = &mb_sysconf;
Stefan Reinauer14e22772010-04-27 06:56:47 +000087
Yinghai Luc34e3ab2006-10-12 00:58:20 +000088 m = sysconf.mb;
89
Stefan Reinauer14e22772010-04-27 06:56:47 +000090 sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
Paul Menzel6a4e9b52013-10-18 09:42:55 +020091 for (i = 0; i < sysconf.hc_possible_num; i++) {
Yinghai Luc34e3ab2006-10-12 00:58:20 +000092 sysconf.pci1234[i] = pci1234x[i];
93 sysconf.hcdn[i] = hcdnx[i];
94 }
Stefan Reinauer14e22772010-04-27 06:56:47 +000095
Yinghai Luc34e3ab2006-10-12 00:58:20 +000096 get_sblk_pci1234();
Stefan Reinauer14e22772010-04-27 06:56:47 +000097
Yinghai Luc34e3ab2006-10-12 00:58:20 +000098 sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
99 m->sbdn3 = sysconf.hcdn[0] & 0xff;
100
101 m->bus_8132_0 = (sysconf.pci1234[0] >> 16) & 0xff;
102 m->bus_8111_0 = m->bus_8132_0;
103
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200104 /* 8111 */
105 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn, 0));
106 if (dev) {
107 m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
108 } else {
109 printk(BIOS_DEBUG,
110 "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
111 m->bus_8111_0, sysconf.sbdn);
112 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000113
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200114 /* 8132-1 */
115 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 0));
116 if (dev) {
117 m->bus_8132_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
118 } else {
119 printk(BIOS_DEBUG,
120 "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
121 m->bus_8132_0, m->sbdn3);
122 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000123
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200124 /* 8132-2 */
125 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3 + 1, 0));
126 if (dev) {
127 m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
128 } else {
129 printk(BIOS_DEBUG,
130 "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
131 m->bus_8132_0, m->sbdn3 + 1);
132 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000133
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200134 /* HT chain 1 */
135 j = 0;
136 for (i = 1; i < sysconf.hc_possible_num; i++) {
137 if (!(sysconf.pci1234[i] & 0x1))
138 continue;
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000139
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200140 // check hcid type here
141 sysconf.hcid[i] = get_hcid(i);
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000142
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200143 switch (sysconf.hcid[i]) {
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000144
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200145 case 1: //8132
146 case 3: //8131
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000147
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200148 m->bus_8132a[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000149
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200150 m->sbdn3a[j] = sysconf.hcdn[i] & 0xff;
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000151
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200152 /* 8132-1 */
153 dev =
154 dev_find_slot(m->bus_8132a[j][0],
155 PCI_DEVFN(m->sbdn3a[j], 0));
156 if (dev) {
157 m->bus_8132a[j][1] =
158 pci_read_config8(dev, PCI_SECONDARY_BUS);
159 } else {
160 printk(BIOS_DEBUG,
161 "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
162 m->bus_8132a[j][0], m->sbdn3a[j]);
163 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000164
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200165 /* 8132-2 */
166 dev =
167 dev_find_slot(m->bus_8132a[j][0],
168 PCI_DEVFN(m->sbdn3a[j] + 1, 0));
169 if (dev) {
170 m->bus_8132a[j][2] =
171 pci_read_config8(dev, PCI_SECONDARY_BUS);
172 } else {
173 printk(BIOS_DEBUG,
174 "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
175 m->bus_8132a[j][0], m->sbdn3a[j] + 1);
176 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000177
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200178 break;
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000179
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200180 case 2: //8151
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000181
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200182 m->bus_8151[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
183 m->sbdn5[j] = sysconf.hcdn[i] & 0xff;
184 /* 8151 */
185 dev =
186 dev_find_slot(m->bus_8151[j][0],
187 PCI_DEVFN(m->sbdn5[j] + 1, 0));
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000188
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200189 if (dev) {
190 m->bus_8151[j][1] =
191 pci_read_config8(dev, PCI_SECONDARY_BUS);
192 } else {
193 printk(BIOS_DEBUG,
194 "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
195 m->bus_8151[j][0], m->sbdn5[j] + 1);
196 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000197
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200198 break;
199 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000200
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200201 j++;
202 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000203
204/*I/O APICs: APIC ID Version State Address*/
Timothy Pearsond4bbfe82015-10-27 16:48:36 -0500205 if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
206 apicid_base = get_apicid_base(3);
207 else
208 apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
Paul Menzel6a4e9b52013-10-18 09:42:55 +0200209 m->apicid_8111 = apicid_base + 0;
210 m->apicid_8132_1 = apicid_base + 1;
211 m->apicid_8132_2 = apicid_base + 2;
212 for (i = 0; i < j; i++) {
213 m->apicid_8132a[i][0] = apicid_base + 3 + i * 2;
214 m->apicid_8132a[i][1] = apicid_base + 3 + i * 2 + 1;
215 }
Yinghai Luc34e3ab2006-10-12 00:58:20 +0000216
217}