Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2012 Ricardo Martins <rasmartins@gmail.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <stdlib.h> |
| 19 | #include <spd.h> |
| 20 | #include <arch/io.h> |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 21 | #include <device/pci_def.h> |
| 22 | #include <device/pnp_def.h> |
| 23 | #include <console/console.h> |
| 24 | #include <cpu/x86/bist.h> |
| 25 | #include <cpu/x86/msr.h> |
| 26 | #include <cpu/amd/lxdef.h> |
| 27 | #include <southbridge/amd/cs5536/cs5536.h> |
| 28 | #include <southbridge/amd/cs5536/early_smbus.c> |
| 29 | #include <southbridge/amd/cs5536/early_setup.c> |
Edward O'Callaghan | 9e308b9 | 2014-04-27 23:28:31 +1000 | [diff] [blame] | 30 | #include <superio/winbond/common/winbond.h> |
Edward O'Callaghan | 793a429 | 2014-04-03 14:30:58 +1100 | [diff] [blame] | 31 | #include <superio/winbond/w83627ehg/w83627ehg.h> |
Christian Gmeiner | 4eb5aa2 | 2013-06-04 17:27:22 +0200 | [diff] [blame] | 32 | #include <northbridge/amd/lx/raminit.h> |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 33 | |
| 34 | #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) |
| 35 | |
Christian Gmeiner | c4e07bb | 2013-06-04 17:34:35 +0200 | [diff] [blame] | 36 | int spd_read_byte(unsigned int device, unsigned int address) |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 37 | { |
| 38 | /* Only DIMM0 is available. */ |
| 39 | if (device != DIMM0) |
| 40 | return 0xff; |
| 41 | |
| 42 | return smbus_read_byte(device, address); |
| 43 | } |
| 44 | |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 45 | #include <northbridge/amd/lx/pll_reset.c> |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 46 | #include <lib/generic_sdram.c> |
| 47 | #include <cpu/amd/geode_lx/cpureginit.c> |
| 48 | #include <cpu/amd/geode_lx/syspreinit.c> |
| 49 | #include <cpu/amd/geode_lx/msrinit.c> |
| 50 | |
Aaron Durbin | a0a3727 | 2014-08-14 08:35:11 -0500 | [diff] [blame] | 51 | #include <cpu/intel/romstage.h> |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 52 | void main(unsigned long bist) |
| 53 | { |
| 54 | static const struct mem_controller memctrl[] = { |
| 55 | {.channel0 = {DIMM0, DIMM1}} |
| 56 | }; |
| 57 | |
| 58 | SystemPreInit(); |
| 59 | msr_init(); |
| 60 | |
| 61 | cs5536_early_setup(); |
| 62 | |
Edward O'Callaghan | 9e308b9 | 2014-04-27 23:28:31 +1000 | [diff] [blame] | 63 | winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 64 | console_init(); |
| 65 | |
| 66 | report_bist_failure(bist); |
| 67 | |
Patrick Georgi | 7dc2864 | 2012-07-13 19:06:22 +0200 | [diff] [blame] | 68 | pll_reset(); |
Ricardo Martins | 0ca0255 | 2012-07-04 03:09:49 +0100 | [diff] [blame] | 69 | |
| 70 | cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED); |
| 71 | |
| 72 | sdram_initialize(1, memctrl); |
| 73 | } |