blob: 306d9f9f809d2652f7575fab83195664a513c11a [file] [log] [blame]
Ricardo Martins0ca02552012-07-04 03:09:49 +01001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2012 Ricardo Martins <rasmartins@gmail.com>
5##
6## This program is free software; you can redistribute it and/or
7## modify it under the terms of the GNU General Public License as
8## published by the Free Software Foundation; version 2 of
9## the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Ricardo Martins0ca02552012-07-04 03:09:49 +010016
17if BOARD_IEI_PM_LX_800_R11
18
19config BOARD_SPECIFIC_OPTIONS
20 def_bool y
Ricardo Martins0ca02552012-07-04 03:09:49 +010021 select CPU_AMD_GEODE_LX
22 select NORTHBRIDGE_AMD_LX
23 select SOUTHBRIDGE_AMD_CS5536
24 select SUPERIO_WINBOND_W83627EHG
25 select HAVE_PIRQ_TABLE
26 select PIRQ_ROUTE
27 select BOARD_ROMSIZE_KB_512
28 select POWER_BUTTON_FORCE_ENABLE
Patrick Georgi7dc28642012-07-13 19:06:22 +020029 select PLL_MANUAL_CONFIG
30 select CORE_GLIU_500_266
Ricardo Martins0ca02552012-07-04 03:09:49 +010031
32config MAINBOARD_DIR
33 string
34 default iei/pm-lx-800-r11
35
36config MAINBOARD_PART_NUMBER
37 string
38 default "PM-LX-800-R11"
39
40config IRQ_SLOT_COUNT
41 int
42 default 7
43
Patrick Georgi7dc28642012-07-13 19:06:22 +020044config PLLMSRlo
45 hex
46 default 0x07de0000
Ricardo Martins0ca02552012-07-04 03:09:49 +010047
Ricardo Martins0ca02552012-07-04 03:09:49 +010048endif # BOARD_IEI_PM_LX_800_R11