blob: 8ad5479ac603d1c4062beb50d7ed028619e1a00a [file] [log] [blame]
Joey Pengfe2d0ec2021-09-02 14:19:37 +08001fw_config
2 field DB_USB 0 1
3 option DB_USB_ABSENT 0
4 option DB_USB3_NO_A 1
5 end
6 field DB_SD 2 3
7 option DB_SD_ABSENT 0
8 option DB_SD_OZ711LV2LN 1
Joey Pengef6a65f2021-10-14 11:10:02 +08009 option DB_SD_GL9750 2
10 option DB_SD_RTS5232S 3
Joey Pengfe2d0ec2021-09-02 14:19:37 +080011 end
12 field KB_BL 4
13 option KB_BL_ABSENT 0
14 option KB_BL_PRESENT 1
15 end
16 field AUDIO 5 7
17 option AUDIO_UNKNOWN 0
18 option AUDIO_MAX98357_ALC5682I_I2S 1
Joey Penge8743752021-10-13 15:46:02 +080019 option AUDIO_MAX98357_ALC5682I_VS_I2S 2
Joey Pengfe2d0ec2021-09-02 14:19:37 +080020 end
21 field KB_LAYOUT 8 9
22 option KB_LAYOUT_DEFAULT 0
23 end
24 field WIFI_SAR_ID 10 11
25 option WIFI_SAR_ID_0 0
26 option WIFI_SAR_ID_1 1
27 option WIFI_SAR_ID_2 2
28 option WIFI_SAR_ID_3 3
29 end
30 field BOOT_NVME_MASK 12
31 option BOOT_NVME_DISABLED 0
32 option BOOT_NVME_ENABLED 1
33 end
34 field BOOT_EMMC_MASK 13
35 option BOOT_EMMC_DISABLED 0
36 option BOOT_EMMC_ENABLED 1
37 end
Dan Callaghanb00bfd02021-10-28 21:26:12 +110038 field HPS 17
39 option HPS_ABSENT 0
40 option HPS_PRESENT 1
41 end
Joey Pengfe2d0ec2021-09-02 14:19:37 +080042end
Kevin Chang819afd82021-07-16 19:37:06 +080043chip soc/intel/alderlake
Kevin Chang70701eb2021-11-04 19:35:31 +080044 register "ext_fivr_settings" = "{
45 .configure_ext_fivr = 1,
46 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
47 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
48 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
49 FIVR_VOLTAGE_MIN_ACTIVE |
50 FIVR_VOLTAGE_MIN_RETENTION,
51 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
52 FIVR_VOLTAGE_MIN_ACTIVE |
53 FIVR_VOLTAGE_MIN_RETENTION,
54 .v1p05_icc_max_ma = 500,
55 .vnn_sx_voltage_mv = 1250,
56 }"
Joey Peng46f769d2021-09-14 22:06:34 +080057 register "TcssAuxOri" = "1"
58 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
Joey Peng79449732021-09-10 13:06:42 +080059 register "SaGv" = "SaGv_Enabled"
Joey Peng46f769d2021-09-14 22:06:34 +080060
Joey Penge0260352021-08-04 17:44:18 +080061 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1
62 register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # DB USB2_C1
63 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN
64 register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN
Kevin Chang819afd82021-07-16 19:37:06 +080065
Joey Penge0260352021-08-04 17:44:18 +080066 # Intel Common SoC Config
67 #+-------------------+---------------------------+
68 #| Field | Value |
69 #+-------------------+---------------------------+
Joey Penge0260352021-08-04 17:44:18 +080070 #| GSPI1 | Fingerprint MCU |
71 #| I2C0 | Audio |
72 #| I2C1 | Touchscreen |
73 #| I2C2 | HPS |
74 #| I2C3 | cr50 TPM. Early init is |
75 #| | required to set up a BAR |
76 #| | for TPM communication |
77 #| I2C5 | Trackpad |
78 #+-------------------+---------------------------+
Joey Penge0260352021-08-04 17:44:18 +080079 register "common_soc_config" = "{
80 .i2c[0] = {
81 .speed = I2C_SPEED_FAST,
82 },
83 .i2c[1] = {
84 .speed = I2C_SPEED_FAST,
85 },
86 .i2c[2] = {
87 .speed = I2C_SPEED_FAST,
88 },
89 .i2c[3] = {
90 .early_init = 1,
91 .speed = I2C_SPEED_FAST,
92 },
93 .i2c[5] = {
94 .speed = I2C_SPEED_FAST,
95 },
96 }"
97 # I2C Port Config
98 register "SerialIoI2cMode" = "{
99 [PchSerialIoIndexI2C0] = PchSerialIoPci,
100 [PchSerialIoIndexI2C1] = PchSerialIoPci,
101 [PchSerialIoIndexI2C2] = PchSerialIoPci,
102 [PchSerialIoIndexI2C3] = PchSerialIoPci,
103 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
104 [PchSerialIoIndexI2C5] = PchSerialIoPci,
105 }"
106 device domain 0 on
Kevin Change3bb49e2021-10-15 13:51:49 +0800107 device ref dtt on
108 chip drivers/intel/dptf
109 ## sensor information
110 register "options.tsr[0].desc" = ""DRAM_SOC""
111 register "options.tsr[1].desc" = ""Ambient""
112 register "options.tsr[2].desc" = ""Charger""
113 register "options.tsr[3].desc" = ""WWAN""
114
115 # TODO: below values are initial reference values only
116 ## Active Policy
117 register "policies.active" = "{
118 [0] = {
119 .target = DPTF_CPU,
120 .thresholds = {
121 TEMP_PCT(85, 90),
122 TEMP_PCT(80, 74),
123 TEMP_PCT(75, 74),
124 TEMP_PCT(70, 74),
125 TEMP_PCT(65, 74),
126 }
127 },
128 [1] = {
129 .target = DPTF_TEMP_SENSOR_1,
130 .thresholds = {
131 TEMP_PCT(51, 74),
132 TEMP_PCT(47, 60),
133 TEMP_PCT(45, 45),
134 TEMP_PCT(42, 45),
135 TEMP_PCT(37, 35),
136 }
137 },
138 [2] = {
139 .target = DPTF_TEMP_SENSOR_2,
140 .thresholds = {
141 TEMP_PCT(51, 74),
142 TEMP_PCT(47, 60),
143 TEMP_PCT(45, 45),
144 TEMP_PCT(42, 45),
145 TEMP_PCT(37, 35),
146 }
147 },
148 [3] = {
149 .target = DPTF_TEMP_SENSOR_3,
150 .thresholds = {
151 TEMP_PCT(51, 74),
152 TEMP_PCT(47, 60),
153 TEMP_PCT(45, 45),
154 TEMP_PCT(42, 45),
155 TEMP_PCT(37, 35),
156 }
157 }
158 }"
159
160 ## Passive Policy
161 register "policies.passive" = "{
162 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
163 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 6000),
164 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 6000),
165 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 6000),
166 [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 90, 6000),
167 }"
168
169 ## Critical Policy
170 register "policies.critical" = "{
171 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
172 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
173 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
174 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN),
175 [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 100, SHUTDOWN),
176 }"
177
178 register "controls.power_limits" = "{
179 .pl1 = {
180 .min_power = 3000,
181 .max_power = 12000,
182 .time_window_min = 28 * MSECS_PER_SEC,
183 .time_window_max = 32 * MSECS_PER_SEC,
184 .granularity = 200,
185 },
186 .pl2 = {
187 .min_power = 55000,
188 .max_power = 55000,
189 .time_window_min = 28 * MSECS_PER_SEC,
190 .time_window_max = 32 * MSECS_PER_SEC,
191 .granularity = 1000,
192 }
193 }"
194
195 ## Charger Performance Control (Control, mA)
196 register "controls.charger_perf" = "{
197 [0] = { 255, 1700 },
198 [1] = { 24, 1500 },
199 [2] = { 16, 1000 },
200 [3] = { 8, 500 }
201 }"
202
203 ## Fan Performance Control (Percent, Speed, Noise, Power)
204 register "controls.fan_perf" = "{
205 [0] = { 100, 6000, 220, 2200, },
206 [1] = { 92, 5500, 180, 1800, },
207 [2] = { 85, 5000, 145, 1450, },
208 [3] = { 74, 4620, 115, 1150, },
209 [4] = { 60, 4290, 90, 900, },
210 [5] = { 45, 3980, 55, 550, },
211 [6] = { 35, 3170, 30, 300, },
212 [7] = { 30, 2640, 15, 150, },
213 [8] = { 10, 800, 10, 100, },
214 [9] = { 0, 0, 0, 50, }
215 }"
216
217 ## Fan options
218 register "options.fan.fine_grained_control" = "1"
219 register "options.fan.step_size" = "2"
220
221 device generic 0 alias dptf_policy on end
222 end
223 end
Joey Penge0260352021-08-04 17:44:18 +0800224 device ref tbt_pcie_rp0 off end
225 device ref tbt_pcie_rp1 off end
226 device ref tbt_pcie_rp2 off end
227 device ref i2c0 on
228 chip drivers/i2c/generic
229 register "hid" = ""10EC5682""
230 register "name" = ""RT58""
231 register "desc" = ""Headset Codec""
232 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
233 # Set the jd_src to RT5668_JD1 for jack detection
234 register "property_count" = "1"
235 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
236 register "property_list[0].name" = ""realtek,jd-src""
237 register "property_list[0].integer" = "1"
238 device i2c 1a on
Joey Pengfe2d0ec2021-09-02 14:19:37 +0800239 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S
Joey Penge0260352021-08-04 17:44:18 +0800240 end
241 end
Joey Penge8743752021-10-13 15:46:02 +0800242 chip drivers/i2c/generic
243 register "hid" = ""RTL5682""
244 register "name" = ""RT58""
245 register "desc" = ""Headset Codec""
246 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
247 # Set the jd_src to RT5668_JD1 for jack detection
248 register "property_count" = "1"
249 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
250 register "property_list[0].name" = ""realtek,jd-src""
251 register "property_list[0].integer" = "1"
252 device i2c 1a on
253 probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S
254 end
255 end
Joey Penge0260352021-08-04 17:44:18 +0800256 end
257 device ref i2c1 on
258 chip drivers/i2c/hid
259 register "generic.hid" = ""GDIX0000""
260 register "generic.desc" = ""Goodix Touchscreen""
261 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
262 register "generic.probed" = "1"
263 register "generic.reset_gpio" =
264 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
265 # Parameter T5 >= 180ms
266 register "generic.reset_delay_ms" = "180"
267 # Parameter T2 >= 1ms
268 register "generic.reset_off_delay_ms" = "3"
269 register "generic.enable_gpio" =
270 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
271 # Parameter T1 >= 20ms
272 register "generic.enable_delay_ms" = "20"
273 register "generic.stop_gpio" =
274 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
275 # Parameter T4 >= 1ms
276 register "generic.stop_off_delay_ms" = "1"
277 register "generic.has_power_resource" = "1"
278 register "hid_desc_reg_offset" = "0x01"
279 device i2c 5d on end
280 end
281 chip drivers/i2c/generic
282 register "hid" = ""ELAN0001""
283 register "desc" = ""ELAN Touchscreen""
284 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
285 register "probed" = "1"
286 register "reset_gpio" =
287 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
288 register "reset_delay_ms" = "20"
289 register "enable_gpio" =
290 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
291 register "enable_delay_ms" = "1"
292 register "has_power_resource" = "1"
293 device i2c 10 on end
294 end
295 end
Dan Callaghanb00bfd02021-10-28 21:26:12 +1100296 device ref i2c2 on
297 chip drivers/i2c/generic
298 register "hid" = ""GOOG0020""
299 register "desc" = ""Chrome OS HPS""
300 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)" # EN_HPS_PWR
301 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E3_IRQ)" # HPS_INT_ODL
302 # HPS uses I2C addresses 0x30 and 0x51.
303 # The address we provide here is not significant because
304 # neither coreboot nor Linux have a driver for HPS,
305 # it's only used from userspace.
306 device i2c 30 on
307 probe HPS HPS_PRESENT
308 end
309 end
310 end
Joey Penge0260352021-08-04 17:44:18 +0800311 device ref i2c5 on
312 chip drivers/i2c/generic
313 register "hid" = ""ELAN0000""
314 register "desc" = ""ELAN Touchpad""
315 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
316 register "wake" = "GPE0_DW2_15"
317 register "probed" = "1"
318 device i2c 15 on end
319 end
320 chip drivers/i2c/hid
321 register "generic.hid" = ""PNP0C50""
322 register "generic.desc" = ""Synaptics Touchpad""
323 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
324 register "generic.wake" = "GPE0_DW2_15"
325 register "generic.probed" = "1"
326 register "hid_desc_reg_offset" = "0x20"
327 device i2c 2c on end
328 end
329 end
330 device ref hda on
331 chip drivers/generic/max98357a
332 register "hid" = ""MX98357A""
333 register "sdmode_gpio" =
334 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
335 register "sdmode_delay" = "5"
Joey Penge0260352021-08-04 17:44:18 +0800336 device generic 0 on
Joey Pengfe2d0ec2021-09-02 14:19:37 +0800337 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S
Joey Pengb0c1e732021-10-27 15:38:08 +0800338 probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S
Joey Penge0260352021-08-04 17:44:18 +0800339 end
340 end
341 end
342 device ref pcie_rp5 on
343 chip soc/intel/common/block/pcie/rtd3
344 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
345 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
346 register "srcclk_pin" = "2"
347 device generic 0 on end
348 end
349 register "pch_pcie_rp[PCH_RP(5)]" = "{
350 .clk_src = 2,
351 .clk_req = 2,
352 .flags = PCIE_RP_LTR | PCIE_RP_AER,
353 }"
354 end
355 device ref pcie_rp6 off end
356 device ref pcie_rp8 on
357 chip soc/intel/common/block/pcie/rtd3
358 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
359 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
360 register "srcclk_pin" = "3"
Joey Pengfe2d0ec2021-09-02 14:19:37 +0800361 device generic 0 on
362 probe DB_SD DB_SD_OZ711LV2LN
Joey Pengef6a65f2021-10-14 11:10:02 +0800363 probe DB_SD DB_SD_GL9750
364 probe DB_SD DB_SD_RTS5232S
Joey Pengfe2d0ec2021-09-02 14:19:37 +0800365 end
Joey Penge0260352021-08-04 17:44:18 +0800366 end
367 end
368 device ref pcie_rp9 on
369 chip soc/intel/common/block/pcie/rtd3
370 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)"
371 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)"
372 register "srcclk_pin" = "1"
373 device generic 0 on end
374 end
375 end
376 device ref gspi1 on
377 chip drivers/spi/acpi
378 register "name" = ""CRFP""
379 register "hid" = "ACPI_DT_NAMESPACE_HID"
380 register "uid" = "1"
381 register "compat_string" = ""google,cros-ec-spi""
382 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
383 register "wake" = "GPE0_DW2_15"
384 device spi 0 on end
385 end # FPMCU
386 end
387 device ref pch_espi on
388 chip ec/google/chromeec
389 use conn0 as mux_conn[0]
390 use conn1 as mux_conn[1]
391 device pnp 0c09.0 on end
392 end
393 end
394 device ref pmc hidden
395 chip drivers/intel/pmc_mux
396 device generic 0 on
397 chip drivers/intel/pmc_mux/conn
398 register "usb2_port_number" = "1"
399 register "usb3_port_number" = "1"
400 device generic 0 alias conn0 on end
401 end
402 chip drivers/intel/pmc_mux/conn
403 register "usb2_port_number" = "3"
404 register "usb3_port_number" = "3"
405 device generic 2 alias conn1 on end
406 end
407 end
408 end
409 end
410 device ref tcss_xhci on
411 chip drivers/usb/acpi
412 device ref tcss_root_hub on
413 chip drivers/usb/acpi
414 register "desc" = ""USB3 Type-C Port C0 (MLB)""
415 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
416 register "group" = "ACPI_PLD_GROUP(1, 1)"
417 device ref tcss_usb3_port1 on end
418 end
419 chip drivers/usb/acpi
420 register "desc" = ""USB3 Type-C Port C1 (DB)""
421 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
422 register "group" = "ACPI_PLD_GROUP(3, 1)"
Joey Pengfe2d0ec2021-09-02 14:19:37 +0800423 device ref tcss_usb3_port3 on
424 probe DB_USB DB_USB3_NO_A
425 end
Joey Penge0260352021-08-04 17:44:18 +0800426 end
427 end
428 end
429 end
430 device ref xhci on
431 chip drivers/usb/acpi
432 device ref xhci_root_hub on
433 chip drivers/usb/acpi
434 register "desc" = ""USB2 Type-C Port C0 (MLB)""
435 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
436 register "group" = "ACPI_PLD_GROUP(1, 1)"
437 device ref usb2_port1 on end
438 end
439 chip drivers/usb/acpi
440 register "desc" = ""USB2 Type-C Port C1 (DB)""
441 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
442 register "group" = "ACPI_PLD_GROUP(3, 1)"
Joey Pengfe2d0ec2021-09-02 14:19:37 +0800443 device ref usb2_port3 on
444 probe DB_USB DB_USB3_NO_A
445 end
Joey Penge0260352021-08-04 17:44:18 +0800446 end
447 chip drivers/usb/acpi
448 register "desc" = ""USB2 Camera""
449 register "type" = "UPC_TYPE_INTERNAL"
450 device ref usb2_port6 on
451 end
452 end
453 chip drivers/usb/acpi
454 register "desc" = ""USB2 Type-A Port (MLB)""
455 register "type" = "UPC_TYPE_A"
456 register "group" = "ACPI_PLD_GROUP(4, 1)"
457 device ref usb2_port9 on end
458 end
459 chip drivers/usb/acpi
460 register "desc" = ""USB2 Bluetooth""
461 register "type" = "UPC_TYPE_INTERNAL"
462 register "reset_gpio" =
463 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
464 device ref usb2_port10 on end
465 end
466 chip drivers/usb/acpi
467 register "desc" = ""USB3 Type-A Port (MLB)""
468 register "type" = "UPC_TYPE_USB3_A"
469 register "group" = "ACPI_PLD_GROUP(4, 1)"
470 device ref usb3_port1 on end
471 end
472 end
473 end
474 end
475 end
Kevin Chang819afd82021-07-16 19:37:06 +0800476end