Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * mnon.h |
| 6 | * |
| 7 | * Ontario Northbridge block |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: (Mem) |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 12 | * @e \$Revision: 48511 $ @e \$Date: 2011-03-09 13:53:13 -0700 (Wed, 09 Mar 2011) $ |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 13 | * |
| 14 | **/ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | |
| 47 | #ifndef _MNON_H_ |
| 48 | #define _MNON_H_ |
| 49 | |
| 50 | /*---------------------------------------------------------------------------- |
| 51 | * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS) |
| 52 | * |
| 53 | *---------------------------------------------------------------------------- |
| 54 | */ |
| 55 | #define MAX_CHANNELS_PER_SOCKET_ON 1 |
| 56 | #define MAX_DCTS_PER_NODE_ON 1 |
| 57 | #define MAX_CHANNELS_PER_DCT_ON 1 |
| 58 | #define MAX_DIMMS_PER_CHANNEL_ON 2 |
| 59 | #define MAX_NODES_SUPPORTED_ON 1 |
| 60 | #define MAX_CS_PER_CHANNEL_ON 4 |
| 61 | |
| 62 | #define DEFAULT_WR_ODT_ON_ON 6 |
| 63 | #define DEFAULT_RD_ODT_ON_ON 6 |
| 64 | |
| 65 | /*----------------------------------------------------------------------------- |
| 66 | * DEFINITIONS AND MACROS |
| 67 | * |
| 68 | *----------------------------------------------------------------------------- |
| 69 | */ |
| 70 | /*---------------------------------------------------------------------------- |
| 71 | * TYPEDEFS, STRUCTURES, ENUMS |
| 72 | * |
| 73 | *---------------------------------------------------------------------------- |
| 74 | */ |
| 75 | |
| 76 | /*---------------------------------------------------------------------------- |
| 77 | * FUNCTIONS PROTOTYPE |
| 78 | * |
| 79 | *---------------------------------------------------------------------------- |
| 80 | */ |
| 81 | |
| 82 | BOOLEAN |
| 83 | MemConstructNBBlockON ( |
| 84 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 85 | IN OUT MEM_DATA_STRUCT *MemPtr, |
Arthur Heymans | 704ccaf | 2022-05-16 14:55:46 +0200 | [diff] [blame^] | 86 | CONST IN MEM_FEAT_BLOCK_NB *FeatPtr, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 87 | IN MEM_SHARED_DATA *SharedPtr, |
| 88 | IN UINT8 NodeID |
| 89 | ); |
| 90 | |
| 91 | VOID |
| 92 | MemNInitDefaultsON ( |
| 93 | IN OUT MEM_DATA_STRUCT *MemPtr |
| 94 | ); |
| 95 | |
| 96 | VOID |
| 97 | MemNSendMrsCmdON ( |
| 98 | IN OUT MEM_NB_BLOCK *NBPtr |
| 99 | ); |
| 100 | |
| 101 | BOOLEAN |
| 102 | MemNAutoConfigON ( |
| 103 | IN OUT MEM_NB_BLOCK *NBPtr |
| 104 | ); |
| 105 | |
| 106 | BOOLEAN |
| 107 | MemNOtherTimingON ( |
| 108 | IN OUT MEM_NB_BLOCK *NBPtr |
| 109 | ); |
| 110 | |
| 111 | UINT8 |
| 112 | MemNCSPerChannelON ( |
| 113 | IN OUT MEM_NB_BLOCK *NBPtr |
| 114 | ); |
| 115 | |
| 116 | VOID |
| 117 | MemNWritePatternON ( |
| 118 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 119 | IN UINT32 Address, |
| 120 | IN UINT8 Pattern[], |
| 121 | IN UINT16 ClCount |
| 122 | ); |
| 123 | |
| 124 | VOID |
| 125 | MemNReadPatternON ( |
| 126 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 127 | IN UINT8 Buffer[], |
| 128 | IN UINT32 Address, |
| 129 | IN UINT16 ClCount |
| 130 | ); |
| 131 | |
| 132 | VOID |
| 133 | MemNInitNBRegTableON ( |
| 134 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 135 | IN OUT TSEFO NBRegTable[] |
| 136 | ); |
| 137 | |
| 138 | VOID |
| 139 | MemNBeforeDQSTrainingON ( |
| 140 | IN OUT MEM_NB_BLOCK *NBPtr |
| 141 | ); |
| 142 | |
| 143 | VOID |
| 144 | MemNAfterDQSTrainingON ( |
| 145 | IN OUT MEM_NB_BLOCK *NBPtr |
| 146 | ); |
| 147 | |
| 148 | BOOLEAN |
| 149 | MemNPlatformSpecificFormFactorInitON ( |
| 150 | IN OUT MEM_NB_BLOCK *NBPtr |
| 151 | ); |
| 152 | |
| 153 | BOOLEAN |
| 154 | MemNIsIdSupportedON ( |
| 155 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 156 | IN CPU_LOGICAL_ID *LogicalIdPtr |
| 157 | ); |
| 158 | |
| 159 | UINT32 |
| 160 | MemNCmnGetSetFieldON ( |
| 161 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 162 | IN UINT8 IsSet, |
| 163 | IN BIT_FIELD_NAME FieldName, |
| 164 | IN UINT32 Field |
| 165 | ); |
| 166 | |
| 167 | UINT32 |
| 168 | MemNGetUmaSizeON ( |
| 169 | IN OUT MEM_NB_BLOCK *NBPtr |
| 170 | ); |
| 171 | |
| 172 | BOOLEAN |
| 173 | MemNBrdcstCheckON ( |
| 174 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 175 | IN BIT_FIELD_NAME FieldName, |
| 176 | IN UINT32 Field |
| 177 | ); |
| 178 | |
| 179 | VOID |
| 180 | MemNTechBlockSwitchON ( |
| 181 | IN OUT MEM_NB_BLOCK *NBPtr |
| 182 | ); |
| 183 | |
| 184 | BOOLEAN |
| 185 | MemNStitchMemoryON ( |
| 186 | IN OUT MEM_NB_BLOCK *NBPtr |
| 187 | ); |
| 188 | |
| 189 | BOOLEAN |
| 190 | MemNHtMemMapInitON ( |
| 191 | IN OUT MEM_NB_BLOCK *NBPtr |
| 192 | ); |
| 193 | |
| 194 | VOID |
| 195 | MemNSetMaxLatencyON ( |
| 196 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 197 | IN UINT16 MaxRcvEnDly |
| 198 | ); |
| 199 | |
| 200 | BOOLEAN |
| 201 | MemNFinalizeMctON ( |
| 202 | IN OUT MEM_NB_BLOCK *NBPtr |
| 203 | ); |
| 204 | |
| 205 | BOOLEAN |
| 206 | memNEnableTrainSequenceON ( |
| 207 | IN OUT MEM_NB_BLOCK *NBPtr |
| 208 | ); |
| 209 | |
| 210 | BOOLEAN |
| 211 | MemNChangeNbFrequencyWrapON ( |
| 212 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 213 | IN UINT32 NBPstate |
| 214 | ); |
| 215 | |
| 216 | BOOLEAN |
| 217 | MemNOverrideRcvEnSeedON ( |
| 218 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 219 | IN OUT VOID *SeedPtr |
| 220 | ); |
| 221 | |
| 222 | VOID |
| 223 | MemNGetMaxLatParamsClientON ( |
| 224 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 225 | IN UINT16 MaxDlyForMaxRdLat, |
| 226 | IN OUT UINT16 *MinDlyPtr, |
| 227 | IN OUT UINT16 *MaxDlyPtr, |
| 228 | IN OUT UINT16 *DlyBiasPtr |
| 229 | ); |
| 230 | |
| 231 | BOOLEAN |
| 232 | MemNForceRdDqsPhaseBON ( |
| 233 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 234 | IN OUT VOID *RdDqsDlyPtr |
| 235 | ); |
| 236 | |
| 237 | BOOLEAN |
| 238 | MemNSetDqsODTON ( |
| 239 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 240 | IN OUT VOID *OptParam |
| 241 | ); |
| 242 | |
| 243 | BOOLEAN |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 244 | MemNBeforeMemClkFreqValON ( |
| 245 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 246 | IN OUT VOID *OptParam |
| 247 | ); |
| 248 | |
| 249 | BOOLEAN |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 250 | MemNResetRxFifoPtrON ( |
| 251 | IN OUT MEM_NB_BLOCK *NBPtr, |
| 252 | IN OUT VOID *OptParam |
| 253 | ); |
| 254 | #endif /* _MNON_H_ */ |