Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /* $NoKeywords:$ */ |
| 2 | /** |
| 3 | * @file |
| 4 | * |
| 5 | * Family specific PCIe configuration data definition |
| 6 | * |
| 7 | * |
| 8 | * |
| 9 | * @xrefitem bom "File Content Label" "Release Content" |
| 10 | * @e project: AGESA |
| 11 | * @e sub-project: GNB |
| 12 | * @e \$Revision: 37710 $ @e \$Date: 2010-09-10 11:08:20 +0800 (Fri, 10 Sep 2010) $ |
| 13 | * |
| 14 | */ |
| 15 | /* |
| 16 | ***************************************************************************** |
| 17 | * |
| 18 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 19 | * All rights reserved. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 20 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 21 | * Redistribution and use in source and binary forms, with or without |
| 22 | * modification, are permitted provided that the following conditions are met: |
| 23 | * * Redistributions of source code must retain the above copyright |
| 24 | * notice, this list of conditions and the following disclaimer. |
| 25 | * * Redistributions in binary form must reproduce the above copyright |
| 26 | * notice, this list of conditions and the following disclaimer in the |
| 27 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 28 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 29 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 30 | * from this software without specific prior written permission. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 31 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 33 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 34 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 35 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 36 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 37 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 38 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 39 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 40 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 41 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | e963b38 | 2014-07-06 19:27:14 +1000 | [diff] [blame] | 42 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 43 | * *************************************************************************** |
| 44 | * |
| 45 | */ |
| 46 | #ifndef _ONTARIOCOMPLEXDATA_H_ |
| 47 | #define _ONTARIOCOMPLEXDATA_H_ |
| 48 | |
| 49 | STATIC |
Arthur Heymans | 704ccaf | 2022-05-16 14:55:46 +0200 | [diff] [blame^] | 50 | CONST F14_COMPLEX_CONFIG ComplexData = { |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 51 | //Silicon |
| 52 | { |
| 53 | DESCRIPTOR_TERMINATE_LIST, |
| 54 | {0}, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 55 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 56 | NULL |
| 57 | }, |
| 58 | //Gpp Wrapper |
| 59 | { |
| 60 | DESCRIPTOR_PCIE_WRAPPER, |
| 61 | GPP_WRAP_ID, |
| 62 | GPP_NUMBER_OF_PIFs, |
| 63 | GPP_START_PHY_LANE, |
| 64 | GPP_END_PHY_LANE, |
| 65 | GPP_CORE_ID, |
| 66 | GPP_CORE_ID, |
| 67 | { |
| 68 | 1, //PowerOffUnusedLanesEnabled, |
| 69 | 1, //PowerOffUnusedPllsEnabled |
| 70 | 1, //ClkGating |
| 71 | 1, //LclkGating |
| 72 | 1, //TxclkGatingPllPowerDown |
| 73 | 1 //PllOffInL1 |
| 74 | }, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 75 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, Port4)), |
| 76 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, Silicon)), |
| 77 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, FmGppWrapper)) |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 78 | }, |
| 79 | //Virtual DDI Wrapper |
| 80 | { |
| 81 | DESCRIPTOR_DDI_WRAPPER | DESCRIPTOR_VIRTUAL | DESCRIPTOR_TERMINATE_LIST, |
| 82 | DDI_WRAP_ID, |
| 83 | 0, |
| 84 | DDI_START_PHY_LANE, |
| 85 | DDI_END_PHY_LANE, |
| 86 | 0xff, |
| 87 | 0x0, |
| 88 | { |
| 89 | 1, //PowerOffUnusedLanesEnabled, |
| 90 | 1, //PowerOffUnusedPllsEnabled |
| 91 | 1, //ClkGating |
| 92 | 1, //LclkGating |
| 93 | 1, //TxclkGatingPllPowerDown |
| 94 | 0 //PllOffInL1 |
| 95 | }, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 96 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, Dpa)), |
| 97 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, Silicon)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 98 | NULL |
| 99 | }, |
| 100 | //Port 4 |
| 101 | { |
| 102 | DESCRIPTOR_PCIE_ENGINE, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 103 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 104 | { PciePortEngine, 4, 4}, |
| 105 | 0, //Initialization Status |
| 106 | 0xFF, //Scratch |
| 107 | { |
| 108 | { |
| 109 | {0}, |
| 110 | 4, |
| 111 | 4, |
| 112 | 4, |
| 113 | 0, |
| 114 | GPP_CORE_ID, |
| 115 | 1, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 116 | {0}, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 117 | FALSE, |
| 118 | LinkStateResetExit |
| 119 | }, |
| 120 | }, |
| 121 | }, |
| 122 | //Port 5 |
| 123 | { |
| 124 | DESCRIPTOR_PCIE_ENGINE, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 125 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 126 | { PciePortEngine, 5, 5}, |
| 127 | 0, //Initialization Status |
| 128 | 0xFF, //Scratch |
| 129 | { |
| 130 | { |
| 131 | {0}, |
| 132 | 5, |
| 133 | 5, |
| 134 | 5, |
| 135 | 0, |
| 136 | GPP_CORE_ID, |
| 137 | 2, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 138 | {0}, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 139 | FALSE, |
| 140 | LinkStateResetExit |
| 141 | }, |
| 142 | }, |
| 143 | }, |
| 144 | //Port 6 |
| 145 | { |
| 146 | DESCRIPTOR_PCIE_ENGINE, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 147 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 148 | { PciePortEngine, 6, 6 }, |
| 149 | 0, //Initialization Status |
| 150 | 0xFF, //Scratch |
| 151 | { |
| 152 | { |
| 153 | {0}, |
| 154 | 6, |
| 155 | 6, |
| 156 | 6, |
| 157 | 0, |
| 158 | GPP_CORE_ID, |
| 159 | 3, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 160 | {0}, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 161 | FALSE, |
| 162 | LinkStateResetExit |
| 163 | }, |
| 164 | }, |
| 165 | }, |
| 166 | //Port 7 |
| 167 | { |
| 168 | DESCRIPTOR_PCIE_ENGINE, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 169 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 170 | { PciePortEngine, 7, 7 }, |
| 171 | 0, //Initialization Status |
| 172 | 0xFF, //Scratch |
| 173 | { |
| 174 | { |
| 175 | {0}, |
| 176 | 7, |
| 177 | 7, |
| 178 | 7, |
| 179 | 0, |
| 180 | GPP_CORE_ID, |
| 181 | 4, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 182 | {0}, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 183 | FALSE, |
| 184 | LinkStateResetExit |
| 185 | }, |
| 186 | }, |
| 187 | }, |
| 188 | //Port 8 |
| 189 | { |
| 190 | DESCRIPTOR_PCIE_ENGINE | DESCRIPTOR_TERMINATE_LIST, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 191 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, GppWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 192 | { PciePortEngine, 0, 3 }, |
| 193 | 0, //Initialization Status |
| 194 | 0xFF, //Scratch |
| 195 | { |
| 196 | { |
| 197 | {PortEnabled, 0, 8, 0, PcieGenMaxSupported, AspmL0sL1, HotplugDisabled, 0x0, {0}}, |
| 198 | 0, |
| 199 | 3, |
| 200 | 8, |
| 201 | 0, |
| 202 | GPP_CORE_ID, |
| 203 | 0, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 204 | {MAKE_SBDFO (0, 0, 8, 0, 0)}, |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 205 | TRUE, |
| 206 | LinkStateTrainingSuccess |
| 207 | }, |
| 208 | }, |
| 209 | }, |
| 210 | //Virtual DpA |
| 211 | { |
| 212 | DESCRIPTOR_DDI_ENGINE | DESCRIPTOR_VIRTUAL, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 213 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, DdiWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 214 | {PcieDdiEngine}, |
| 215 | 0, //Initialization Status |
| 216 | 0xFF, //Scratch |
| 217 | }, |
| 218 | //Virtual DpB |
| 219 | { |
| 220 | DESCRIPTOR_DDI_ENGINE | DESCRIPTOR_VIRTUAL, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 221 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, DdiWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 222 | {PcieDdiEngine}, |
| 223 | 0, //Initialization Status |
| 224 | 0xFF, //Scratch |
| 225 | }, |
| 226 | //Virtual VGA |
| 227 | { |
| 228 | DESCRIPTOR_DDI_ENGINE | DESCRIPTOR_VIRTUAL | DESCRIPTOR_TERMINATE_LIST, |
efdesign98 | 84cbce2 | 2011-08-04 12:09:17 -0600 | [diff] [blame] | 229 | (VOID *)(offsetof (F14_COMPLEX_CONFIG, DdiWrapper)), |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 230 | {PcieDdiEngine}, |
| 231 | 0, //Initialization Status |
| 232 | 0xFF, //Scratch |
| 233 | }, |
| 234 | //Native Gen Support |
| 235 | //Set to TRUE after bringup |
| 236 | { |
| 237 | TRUE, |
| 238 | } |
| 239 | |
| 240 | }; |
| 241 | #endif |