Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 3 | /* PCI IRQ mapping registers, C00h-C01h. */ |
| 4 | OperationRegion(PRQM, SystemIO, 0x00000c00, 0x00000002) |
| 5 | Field(PRQM, ByteAcc, NoLock, Preserve) { |
| 6 | PRQI, 0x00000008, |
| 7 | PRQD, 0x00000008, /* Offset: 1h */ |
| 8 | } |
| 9 | /* |
| 10 | * All PIC indexes are prefixed with P. |
| 11 | * All IO-APIC indexes are prefixed with I. |
| 12 | */ |
| 13 | IndexField(PRQI, PRQD, ByteAcc, NoLock, Preserve) { |
| 14 | PIRA, 0x00000008, /* Index 0: INTA */ |
| 15 | PIRB, 0x00000008, /* Index 1: INTB */ |
| 16 | PIRC, 0x00000008, /* Index 2: INTC */ |
| 17 | PIRD, 0x00000008, /* Index 3: INTD */ |
| 18 | PIRE, 0x00000008, /* Index 4: INTE */ |
| 19 | PIRF, 0x00000008, /* Index 5: INTF */ |
| 20 | PIRG, 0x00000008, /* Index 6: INTG */ |
| 21 | PIRH, 0x00000008, /* Index 7: INTH */ |
| 22 | |
| 23 | Offset (0x43), |
| 24 | PMMC, 0x00000008, /* Index 0x43: eMMC */ |
| 25 | |
| 26 | Offset (0x62), |
| 27 | PGPI, 0x00000008, /* Index 0x62: GPIO */ |
| 28 | |
| 29 | Offset (0x70), |
| 30 | PI20, 0x00000008, /* Index 0x70: I2C0 */ |
| 31 | PI21, 0x00000008, /* Index 0x71: I2C1 */ |
| 32 | PI22, 0x00000008, /* Index 0x72: I2C2 */ |
| 33 | PI23, 0x00000008, /* Index 0x73: I2C3 */ |
| 34 | PUA0, 0x00000008, /* Index 0x74: UART0 */ |
| 35 | PUA1, 0x00000008, /* Index 0x75: UART1 */ |
| 36 | PI24, 0x00000008, /* Index 0x76: I2C4 */ |
Felix Held | 2f478b8 | 2022-01-11 17:05:11 +0100 | [diff] [blame] | 37 | PUA4, 0x00000008, /* Index 0x77: UART4 */ |
| 38 | PUA2, 0x00000008, /* Index 0x78: UART2 */ |
| 39 | PUA3, 0x00000008, /* Index 0x79: UART3 */ |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 40 | |
| 41 | /* IO-APIC IRQs */ |
| 42 | Offset (0x80), |
| 43 | IORA, 0x00000008, /* Index 0x80: INTA */ |
| 44 | IORB, 0x00000008, /* Index 0x81: INTB */ |
| 45 | IORC, 0x00000008, /* Index 0x82: INTC */ |
| 46 | IORD, 0x00000008, /* Index 0x83: INTD */ |
| 47 | IORE, 0x00000008, /* Index 0x84: INTE */ |
| 48 | IORF, 0x00000008, /* Index 0x85: INTF */ |
| 49 | IORG, 0x00000008, /* Index 0x86: INTG */ |
| 50 | IORH, 0x00000008, /* Index 0x87: INTH */ |
| 51 | |
| 52 | Offset (0xC3), |
| 53 | IMMC, 0x00000008, /* Index 0xC3: eMMC */ |
| 54 | |
| 55 | Offset (0xE2), |
| 56 | IGPI, 0x00000008, /* Index 0xE2: GPIO */ |
| 57 | |
| 58 | Offset (0xF0), |
| 59 | II20, 0x00000008, /* Index 0xF0: I2C0 */ |
| 60 | II21, 0x00000008, /* Index 0xF1: I2C1 */ |
| 61 | II22, 0x00000008, /* Index 0xF2: I2C2 */ |
| 62 | II23, 0x00000008, /* Index 0xF3: I2C3 */ |
| 63 | IUA0, 0x00000008, /* Index 0xF4: UART0 */ |
| 64 | IUA1, 0x00000008, /* Index 0xF5: UART1 */ |
| 65 | II24, 0x00000008, /* Index 0xF6: I2C4 */ |
Felix Held | 2f478b8 | 2022-01-11 17:05:11 +0100 | [diff] [blame] | 66 | IUA4, 0x00000008, /* Index 0xF7: UART4 */ |
| 67 | IUA2, 0x00000008, /* Index 0xF8: UART2 */ |
| 68 | IUA3, 0x00000008, /* Index 0xF9: UART3 */ |
Felix Held | 3c44c62 | 2022-01-10 20:57:29 +0100 | [diff] [blame] | 69 | } |