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Daisuke Nojiri05949142014-11-21 15:33:26 -08001/*
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -08002 * This file is part of the coreboot project.
Daisuke Nojiri05949142014-11-21 15:33:26 -08003 *
4 * Copyright (C) 2014 The Linux Foundation. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -080030#include <arch/io.h>
Daisuke Nojiri05949142014-11-21 15:33:26 -080031#include <assert.h>
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -080032#include <console/console.h>
33#include <delay.h>
34#include <device/i2c.h>
35#include <stdlib.h>
36#include <string.h>
37#include <soc/gsbi.h>
38#include <soc/qup.h>
Daisuke Nojiri05949142014-11-21 15:33:26 -080039
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -080040static const qup_config_t gsbi4_qup_config = {
41 QUP_MINICORE_I2C_MASTER,
42 100000,
43 24000000,
44 QUP_MODE_FIFO
45};
Daisuke Nojiri05949142014-11-21 15:33:26 -080046
47static int i2c_read(uint32_t gsbi_id, uint8_t slave,
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -080048 uint8_t *data, int data_len)
Daisuke Nojiri05949142014-11-21 15:33:26 -080049{
50 qup_data_t obj;
51 qup_return_t qup_ret = 0;
52
53 memset(&obj, 0, sizeof(obj));
54 obj.protocol = QUP_MINICORE_I2C_MASTER;
55 obj.p.iic.addr = slave;
56 obj.p.iic.data_len = data_len;
57 obj.p.iic.data = data;
58 qup_ret = qup_recv_data(gsbi_id, &obj);
59
60 if (QUP_SUCCESS != qup_ret)
61 return 1;
62 else
63 return 0;
64}
65
66static int i2c_write(uint32_t gsbi_id, uint8_t slave,
67 uint8_t *data, int data_len, uint8_t stop_seq)
68{
69 qup_data_t obj;
70 qup_return_t qup_ret = 0;
71
72 memset(&obj, 0, sizeof(obj));
73 obj.protocol = QUP_MINICORE_I2C_MASTER;
74 obj.p.iic.addr = slave;
75 obj.p.iic.data_len = data_len;
76 obj.p.iic.data = data;
77 qup_ret = qup_send_data(gsbi_id, &obj, stop_seq);
78
79 if (QUP_SUCCESS != qup_ret)
80 return 1;
81 else
82 return 0;
83}
84
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -080085static int i2c_init(unsigned bus)
Daisuke Nojiri05949142014-11-21 15:33:26 -080086{
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -080087 static uint8_t initialized = 0;
88 unsigned gsbi_id = bus;
89
90 if (initialized)
91 return 0;
92
93 if (gsbi_init(gsbi_id, GSBI_PROTO_I2C_ONLY)) {
94 printk(BIOS_ERR, "failed to initialize gsbi\n");
95 return 1;
96 }
97
98 if (qup_init(gsbi_id, &gsbi4_qup_config)) {
99 printk(BIOS_ERR, "failed to initialize qup\n");
100 return 1;
101 }
102
103 if (qup_reset_i2c_master_status(gsbi_id)) {
104 printk(BIOS_ERR, "failed to reset i2c master status\n");
105 return 1;
106 }
107
108 initialized = 1;
109 return 0;
110}
111
112int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
113{
114 struct i2c_seg *seg = segments;
Daisuke Nojiri05949142014-11-21 15:33:26 -0800115 int ret = 0;
116
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -0800117 if (i2c_init(bus))
118 return 1;
Daisuke Nojiri05949142014-11-21 15:33:26 -0800119
120 while (seg_count--) {
121 if (seg->read)
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -0800122 ret = i2c_read(bus, seg->chip, seg->buf, seg->len);
Daisuke Nojiri05949142014-11-21 15:33:26 -0800123 else
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -0800124 ret = i2c_write(bus, seg->chip, seg->buf, seg->len,
125 (seg_count ? 0 : 1));
Daisuke Nojiri05949142014-11-21 15:33:26 -0800126 seg++;
127 }
128
Vadim Bendebury6fe4e5e2014-12-06 10:44:58 -0800129 if (ret) {
130 qup_set_state(bus, QUP_STATE_RESET);
Daisuke Nojiri05949142014-11-21 15:33:26 -0800131 return 1;
132 }
133
134 return 0;
135}