Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #ifndef PSP_VERSTAGE_H |
| 4 | #define PSP_VERSTAGE_H |
| 5 | |
Kangheui Won | ce0fad5 | 2021-06-25 16:03:05 +1000 | [diff] [blame] | 6 | #include <2crypto.h> |
Kangheui Won | 26bb4aa | 2021-10-18 15:31:45 +1100 | [diff] [blame] | 7 | #include <amdblocks/psp_efs.h> |
Kangheui Won | ce0fad5 | 2021-06-25 16:03:05 +1000 | [diff] [blame] | 8 | #include <bl_uapp/bl_syscall_public.h> |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 9 | #include <stdint.h> |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 10 | #include <soc/psp_transfer.h> |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 11 | |
| 12 | #define EMBEDDED_FW_SIGNATURE 0x55aa55aa |
| 13 | #define PSP_COOKIE 0x50535024 /* 'PSP$' */ |
Zheng Bao | 96a3371 | 2021-06-11 15:54:40 +0800 | [diff] [blame] | 14 | #define BHD_COOKIE 0x44484224 /* 'DHB$ */ |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 15 | |
| 16 | #define PSP_VBOOT_ERROR_SUBCODE 0x0D5D0000 |
| 17 | |
| 18 | #define POSTCODE_ENTERED_PSP_VERSTAGE 0x00 |
| 19 | #define POSTCODE_CONSOLE_INIT 0x01 |
| 20 | #define POSTCODE_EARLY_INIT 0x02 |
| 21 | #define POSTCODE_LATE_INIT 0x03 |
| 22 | #define POSTCODE_VERSTAGE_MAIN 0x04 |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 23 | #define POSTCODE_VERSTAGE_S0I3_RESUME 0x05 |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 24 | |
Martin Roth | 0b6f35d | 2020-07-23 16:43:36 -0600 | [diff] [blame] | 25 | #define POSTCODE_SAVE_BUFFERS 0x0E |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 26 | #define POSTCODE_UPDATE_BOOT_REGION 0x0F |
| 27 | |
| 28 | #define POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE 0xC0 |
| 29 | #define POSTCODE_WORKBUF_RESIZE_WARNING 0xC1 |
| 30 | #define POSTCODE_WORKBUF_SAVE_ERROR 0xC2 |
| 31 | #define POSTCODE_WORKBUF_BUFFER_SIZE_ERROR 0xC3 |
| 32 | #define POSTCODE_ROMSIG_MISMATCH_ERROR 0xC4 |
| 33 | #define POSTCODE_PSP_COOKIE_MISMATCH_ERROR 0xC5 |
Zheng Bao | 96a3371 | 2021-06-11 15:54:40 +0800 | [diff] [blame] | 34 | #define POSTCODE_BHD_COOKIE_MISMATCH_ERROR 0xC6 |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 35 | #define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR 0xC7 |
Martin Roth | e21698b | 2020-06-26 08:55:15 -0600 | [diff] [blame] | 36 | #define POSTCODE_FMAP_REGION_MISSING 0xC8 |
| 37 | #define POSTCODE_AMD_FW_MISSING 0xC9 |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 38 | #define POSTCODE_CMOS_RECOVERY 0xCA |
Rob Barnes | c30a1fa | 2021-11-08 06:43:07 -0700 | [diff] [blame] | 39 | #define POSTCODE_EARLY_INIT_ERROR 0xCB |
Rob Barnes | b35acf9 | 2021-11-02 17:47:47 -0600 | [diff] [blame] | 40 | #define POSTCODE_INIT_TPM_FAILED 0xCC |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame^] | 41 | #define POSTCODE_MAP_SPI_ROM_FAILED 0xCD |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 42 | |
| 43 | #define POSTCODE_UNMAP_SPI_ROM 0xF0 |
| 44 | #define POSTCODE_UNMAP_FCH_DEVICES 0xF1 |
| 45 | #define POSTCODE_LEAVING_VERSTAGE 0xF2 |
| 46 | |
| 47 | #define SPI_ADDR_MASK 0x00ffffff |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 48 | #define MIN_TRANSFER_BUFFER_SIZE (8 * KiB) |
| 49 | #define MIN_WORKBUF_TRANSFER_SIZE (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE) |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 50 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 51 | void test_svc_calls(void); |
| 52 | uint32_t unmap_fch_devices(void); |
| 53 | uint32_t verstage_soc_early_init(void); |
Rob Barnes | f6e421f | 2021-11-08 13:04:18 -0700 | [diff] [blame] | 54 | void verstage_mainboard_espi_init(void); |
Rob Barnes | 188be6b | 2021-11-09 13:21:28 -0700 | [diff] [blame] | 55 | void verstage_mainboard_tpm_init(void); |
Rob Barnes | 847a39f | 2021-11-15 12:56:34 -0700 | [diff] [blame] | 56 | void verstage_soc_aoac_init(void); |
| 57 | void verstage_soc_espi_init(void); |
| 58 | void verstage_soc_i2c_init(void); |
| 59 | void verstage_soc_spi_init(void); |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame^] | 60 | void *map_spi_rom(void); |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 61 | |
Kangheui Won | a767eb4 | 2021-04-14 09:35:28 +1000 | [diff] [blame] | 62 | uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset); |
| 63 | uint32_t save_uapp_data(void *address, uint32_t size); |
Kangheui Won | 26bb4aa | 2021-10-18 15:31:45 +1100 | [diff] [blame] | 64 | uint32_t get_bios_dir_addr(struct embedded_firmware *ef_table); |
Kangheui Won | ce0fad5 | 2021-06-25 16:03:05 +1000 | [diff] [blame] | 65 | int platform_set_sha_op(enum vb2_hash_algorithm hash_alg, |
| 66 | struct sha_generic_data *sha_op); |
Kangheui Won | 7e91db7 | 2022-01-25 18:55:04 +1100 | [diff] [blame] | 67 | void platform_report_mode(int developer_mode_enabled); |
Kangheui Won | a767eb4 | 2021-04-14 09:35:28 +1000 | [diff] [blame] | 68 | |
Kangheui Won | 5fb435a | 2021-12-22 12:24:17 +1100 | [diff] [blame] | 69 | void update_psp_fw_hash_table(const char *fname); |
| 70 | |
Karthikeyan Ramasubramanian | ef12976 | 2022-12-22 13:07:28 -0700 | [diff] [blame] | 71 | void report_prev_boot_status_to_vboot(void); |
| 72 | |
Karthikeyan Ramasubramanian | e5f627a | 2022-12-22 13:05:12 -0700 | [diff] [blame] | 73 | void report_hsp_secure_state(void); |
| 74 | |
Karthikeyan Ramasubramanian | 6f1b03b | 2023-04-21 14:26:51 -0600 | [diff] [blame^] | 75 | uint32_t boot_dev_get_active_map_count(void); |
| 76 | |
Martin Roth | c7acf16 | 2020-05-28 00:44:50 -0600 | [diff] [blame] | 77 | #endif /* PSP_VERSTAGE_H */ |