| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 1 | FLASH 32M { |
| 2 | SI_ALL 6M { |
| 3 | SI_DESC 4K |
| Bernardo Perez Priego | e008c46 | 2021-10-27 10:19:53 -0700 | [diff] [blame] | 4 | SI_EC 512K |
| Furquan Shaikh | d06c091 | 2021-10-25 15:47:39 -0700 | [diff] [blame] | 5 | SI_ME { |
| 6 | CSE_LAYOUT 8K |
| 7 | CSE_RO 1588K |
| 8 | CSE_DATA 512K |
| 9 | # 64-KiB aligned to optimize RW erases during CSE update. |
| Bernardo Perez Priego | e008c46 | 2021-10-27 10:19:53 -0700 | [diff] [blame] | 10 | CSE_RW 3520K |
| Furquan Shaikh | d06c091 | 2021-10-25 15:47:39 -0700 | [diff] [blame] | 11 | } |
| Subrata Banik | efc4009 | 2020-10-05 21:04:22 +0530 | [diff] [blame] | 12 | } |
| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 13 | SI_BIOS 26M { |
| 14 | RW_SECTION_A 8M { |
| 15 | VBLOCK_A 64K |
| 16 | FW_MAIN_A(CBFS) |
| 17 | RW_FWID_A 64 |
| Reka Norman | 6d27905 | 2021-11-08 14:53:19 +1100 | [diff] [blame^] | 18 | ME_RW_A(CBFS) 3520K |
| Subrata Banik | efc4009 | 2020-10-05 21:04:22 +0530 | [diff] [blame] | 19 | } |
| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 20 | RW_LEGACY(CBFS) 1M |
| 21 | RW_MISC 1M { |
| 22 | UNIFIED_MRC_CACHE(PRESERVE) 192K { |
| 23 | RECOVERY_MRC_CACHE 64K |
| 24 | RW_MRC_CACHE 128K |
| Subrata Banik | efc4009 | 2020-10-05 21:04:22 +0530 | [diff] [blame] | 25 | } |
| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 26 | RW_ELOG(PRESERVE) 16K |
| 27 | RW_SHARED 16K { |
| 28 | SHARED_DATA 8K |
| 29 | VBLOCK_DEV 8K |
| Subrata Banik | efc4009 | 2020-10-05 21:04:22 +0530 | [diff] [blame] | 30 | } |
| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 31 | RW_VPD(PRESERVE) 8K |
| 32 | RW_NVRAM(PRESERVE) 24K |
| Subrata Banik | efc4009 | 2020-10-05 21:04:22 +0530 | [diff] [blame] | 33 | } |
| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 34 | # This section starts at the 16M boundary in SPI flash. |
| 35 | # ADL does not support a region crossing this boundary, |
| 36 | # because the SPI flash is memory-mapped into two non- |
| 37 | # contiguous windows. |
| 38 | RW_SECTION_B 8M { |
| 39 | VBLOCK_B 64K |
| 40 | FW_MAIN_B(CBFS) |
| 41 | RW_FWID_B 64 |
| Reka Norman | 6d27905 | 2021-11-08 14:53:19 +1100 | [diff] [blame^] | 42 | ME_RW_B(CBFS) 3520K |
| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 43 | } |
| 44 | # Make WP_RO region align with SPI vendor |
| 45 | # memory protected range specification. |
| 46 | WP_RO 8M { |
| 47 | RO_VPD(PRESERVE) 16K |
| Subrata Banik | efc4009 | 2020-10-05 21:04:22 +0530 | [diff] [blame] | 48 | RO_SECTION { |
| Maulik V Vaghela | e46e740 | 2021-04-28 18:32:35 +0530 | [diff] [blame] | 49 | FMAP 2K |
| 50 | RO_FRID 64 |
| 51 | GBB@4K 448K |
| Subrata Banik | efc4009 | 2020-10-05 21:04:22 +0530 | [diff] [blame] | 52 | COREBOOT(CBFS) |
| 53 | } |
| 54 | } |
| 55 | } |
| 56 | } |