Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2009 Dynon Avionics |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
Paul Menzel | a46a712 | 2013-02-23 18:37:27 +0100 | [diff] [blame] | 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 $ |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include <arch/io.h> |
| 22 | #include <device/device.h> |
| 23 | #include <device/pnp.h> |
Nico Huber | 1c81128 | 2013-06-15 20:33:44 +0200 | [diff] [blame] | 24 | #include <superio/conf_mode.h> |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 25 | #include <console/console.h> |
| 26 | #include <string.h> |
| 27 | #include <stdint.h> |
| 28 | #include <stdlib.h> |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 29 | #include <uart8250.h> |
| 30 | #include <pc80/keyboard.h> |
| 31 | #include "chip.h" |
| 32 | #include "w83627uhg.h" |
| 33 | |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 34 | /* |
| 35 | * Set the UART clock source. |
| 36 | * |
| 37 | * Possible UART clock source speeds are: |
| 38 | * |
| 39 | * 0 = 1.8462 MHz (default) |
| 40 | * 1 = 2 MHz |
| 41 | * 2 = 24 MHz |
| 42 | * 3 = 14.769 MHz |
| 43 | * |
| 44 | * The faster clocks allow for BAUD rates up to 2mbits. |
| 45 | * |
| 46 | * Warning: The kernel will need to be adjusted since it assumes |
| 47 | * a 1.8462 MHz clock. |
| 48 | */ |
| 49 | static void set_uart_clock_source(device_t dev, u8 uart_clock) |
| 50 | { |
| 51 | u8 value; |
| 52 | |
Nico Huber | 13dc976 | 2013-06-15 19:33:15 +0200 | [diff] [blame] | 53 | pnp_enter_conf_mode(dev); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 54 | pnp_set_logical_device(dev); |
| 55 | value = pnp_read_config(dev, 0xf0); |
| 56 | value &= ~0x03; |
| 57 | value |= (uart_clock & 0x03); |
| 58 | pnp_write_config(dev, 0xf0, value); |
Nico Huber | 13dc976 | 2013-06-15 19:33:15 +0200 | [diff] [blame] | 59 | pnp_exit_conf_mode(dev); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 60 | } |
| 61 | |
| 62 | static void w83627uhg_init(device_t dev) |
| 63 | { |
Uwe Hermann | 340fa93 | 2010-11-10 14:53:36 +0000 | [diff] [blame] | 64 | struct superio_winbond_w83627uhg_config *conf = dev->chip_info; |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 65 | |
| 66 | if (!dev->enabled) |
| 67 | return; |
| 68 | |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 69 | switch(dev->path.pnp.device) { |
Zheng Bao | 9db833b | 2009-12-28 09:59:44 +0000 | [diff] [blame] | 70 | case W83627UHG_SP1: |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 71 | /* set_uart_clock_source(dev, 0); */ |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 72 | break; |
| 73 | case W83627UHG_SP2: |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 74 | /* set_uart_clock_source(dev, 0); */ |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 75 | break; |
| 76 | case W83627UHG_SP3: |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 77 | /* set_uart_clock_source(dev, 0); */ |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 78 | break; |
| 79 | case W83627UHG_SP4: |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 80 | /* set_uart_clock_source(dev, 0); */ |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 81 | break; |
| 82 | case W83627UHG_SP5: |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 83 | /* set_uart_clock_source(dev, 0); */ |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 84 | break; |
| 85 | case W83627UHG_SP6: |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 86 | /* set_uart_clock_source(dev, 0); */ |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 87 | break; |
| 88 | case W83627UHG_KBC: |
Stefan Reinauer | 740b587 | 2010-02-23 20:31:37 +0000 | [diff] [blame] | 89 | pc_keyboard_init(&conf->keyboard); |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 90 | break; |
| 91 | } |
| 92 | } |
| 93 | |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 94 | static struct device_operations ops = { |
| 95 | .read_resources = pnp_read_resources, |
Nico Huber | 0b2ee93 | 2013-06-15 19:58:35 +0200 | [diff] [blame] | 96 | .set_resources = pnp_set_resources, |
| 97 | .enable_resources = pnp_enable_resources, |
| 98 | .enable = pnp_enable, |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 99 | .init = w83627uhg_init, |
Nico Huber | 1c81128 | 2013-06-15 20:33:44 +0200 | [diff] [blame] | 100 | .ops_pnp_mode = &pnp_conf_mode_8787_aa, |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 101 | }; |
| 102 | |
| 103 | static struct pnp_info pnp_dev_info[] = { |
Uwe Hermann | a69d978 | 2010-11-15 19:35:14 +0000 | [diff] [blame] | 104 | { &ops, W83627UHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, |
| 105 | { &ops, W83627UHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, |
| 106 | { &ops, W83627UHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, |
| 107 | { &ops, W83627UHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, |
| 108 | { &ops, W83627UHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, |
| 109 | { &ops, W83627UHG_SP3, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 110 | { &ops, W83627UHG_GPIO3_4, }, |
| 111 | { &ops, W83627UHG_WDTO_PLED_GPIO5_6, }, |
Uwe Hermann | a69d978 | 2010-11-15 19:35:14 +0000 | [diff] [blame] | 112 | { &ops, W83627UHG_GPIO1_2, }, |
| 113 | { &ops, W83627UHG_ACPI, PNP_IRQ0, }, |
| 114 | { &ops, W83627UHG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, |
| 115 | { &ops, W83627UHG_PECI_SST, }, |
| 116 | { &ops, W83627UHG_SP4, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, |
| 117 | { &ops, W83627UHG_SP5, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, |
| 118 | { &ops, W83627UHG_SP6, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, |
Dan Lykowski | fdbb8d8 | 2009-01-06 00:33:30 +0000 | [diff] [blame] | 119 | }; |
| 120 | |
| 121 | static void enable_dev(device_t dev) |
| 122 | { |
| 123 | pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); |
| 124 | } |
| 125 | |
| 126 | struct chip_operations superio_winbond_w83627uhg_ops = { |
| 127 | CHIP_NAME("Winbond W83627UHG Super I/O") |
| 128 | .enable_dev = enable_dev, |
| 129 | }; |