Angel Pons | f23ae0b | 2020-04-02 23:48:12 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Yinghai Lu | 72ee9b0 | 2005-12-14 02:39:33 +0000 | [diff] [blame] | 2 | |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 3 | #include <cpu/x86/cr.h> |
Kyösti Mälkki | bae775a | 2014-12-18 10:36:33 +0200 | [diff] [blame] | 4 | #include <cpu/x86/gdt.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 5 | #include <cpu/x86/lapic.h> |
Kyösti Mälkki | c4fdb7b | 2019-08-10 15:51:59 +0300 | [diff] [blame] | 6 | #include <cpu/x86/smi_deprecated.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 7 | #include <acpi/acpi.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 8 | #include <delay.h> |
Stefan Reinauer | 75dbc38 | 2012-10-15 15:19:43 -0700 | [diff] [blame] | 9 | #include <lib.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 10 | #include <string.h> |
Julius Werner | ec5e5e0 | 2014-08-20 15:29:56 -0700 | [diff] [blame] | 11 | #include <symbols.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 12 | #include <console/console.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 13 | #include <device/device.h> |
| 14 | #include <device/path.h> |
| 15 | #include <smp/atomic.h> |
| 16 | #include <smp/spinlock.h> |
| 17 | #include <cpu/cpu.h> |
Stefan Reinauer | 2bdfb48 | 2012-04-03 16:17:11 -0700 | [diff] [blame] | 18 | #include <cpu/intel/speedstep.h> |
Elyes HAOUAS | dda17fa | 2019-10-27 13:09:37 +0100 | [diff] [blame] | 19 | #include <smp/node.h> |
Elyes HAOUAS | 845652b | 2019-06-23 06:55:41 +0200 | [diff] [blame] | 20 | #include <stdlib.h> |
Aaron Durbin | 38c326d | 2013-05-06 12:22:23 -0500 | [diff] [blame] | 21 | #include <thread.h> |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 22 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 23 | /* This is a lot more paranoid now, since Linux can NOT handle |
Zheng Bao | d4c5c44 | 2010-02-20 09:38:16 +0000 | [diff] [blame] | 24 | * being told there is a CPU when none exists. So any errors |
| 25 | * will return 0, meaning no CPU. |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 26 | * |
| 27 | * We actually handling that case by noting which cpus startup |
Martin Roth | 4c3ab73 | 2013-07-08 16:23:54 -0600 | [diff] [blame] | 28 | * and not telling anyone about the ones that don't. |
Zheng Bao | d4c5c44 | 2010-02-20 09:38:16 +0000 | [diff] [blame] | 29 | */ |
Kyösti Mälkki | 63539bb | 2012-07-05 06:31:15 +0300 | [diff] [blame] | 30 | |
| 31 | /* Start-UP IPI vector must be 4kB aligned and below 1MB. */ |
| 32 | #define AP_SIPI_VECTOR 0x1000 |
Yinghai Lu | 72ee9b0 | 2005-12-14 02:39:33 +0000 | [diff] [blame] | 33 | |
Kyösti Mälkki | a16cd9c | 2016-06-16 00:40:16 +0300 | [diff] [blame] | 34 | static char *lowmem_backup; |
| 35 | static char *lowmem_backup_ptr; |
| 36 | static int lowmem_backup_size; |
Rudolf Marek | a572f83 | 2009-04-13 17:57:44 +0000 | [diff] [blame] | 37 | |
Aaron Durbin | a146d58 | 2013-02-08 16:56:51 -0600 | [diff] [blame] | 38 | static inline void setup_secondary_gdt(void) |
| 39 | { |
| 40 | u16 *gdt_limit; |
Patrick Rudolph | adcf782 | 2020-08-27 20:50:18 +0200 | [diff] [blame] | 41 | #if ENV_X86_64 |
Stefan Reinauer | e021dea | 2015-06-18 01:15:27 -0700 | [diff] [blame] | 42 | u64 *gdt_base; |
| 43 | #else |
Aaron Durbin | a146d58 | 2013-02-08 16:56:51 -0600 | [diff] [blame] | 44 | u32 *gdt_base; |
Stefan Reinauer | e021dea | 2015-06-18 01:15:27 -0700 | [diff] [blame] | 45 | #endif |
Aaron Durbin | a146d58 | 2013-02-08 16:56:51 -0600 | [diff] [blame] | 46 | |
| 47 | gdt_limit = (void *)&_secondary_gdt_addr; |
| 48 | gdt_base = (void *)&gdt_limit[1]; |
| 49 | |
Stefan Reinauer | e021dea | 2015-06-18 01:15:27 -0700 | [diff] [blame] | 50 | *gdt_limit = (uintptr_t)&gdt_end - (uintptr_t)&gdt - 1; |
| 51 | *gdt_base = (uintptr_t)&gdt; |
Aaron Durbin | a146d58 | 2013-02-08 16:56:51 -0600 | [diff] [blame] | 52 | } |
Myles Watson | 6e23576 | 2009-09-29 14:56:15 +0000 | [diff] [blame] | 53 | |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 54 | static void copy_secondary_start_to_lowest_1M(void) |
Yinghai Lu | 72ee9b0 | 2005-12-14 02:39:33 +0000 | [diff] [blame] | 55 | { |
Zheng Bao | d4c5c44 | 2010-02-20 09:38:16 +0000 | [diff] [blame] | 56 | unsigned long code_size; |
Yinghai Lu | 72ee9b0 | 2005-12-14 02:39:33 +0000 | [diff] [blame] | 57 | |
Aaron Durbin | a146d58 | 2013-02-08 16:56:51 -0600 | [diff] [blame] | 58 | /* Fill in secondary_start's local gdt. */ |
| 59 | setup_secondary_gdt(); |
| 60 | |
Lee Leahy | c591707 | 2017-03-15 16:38:51 -0700 | [diff] [blame] | 61 | code_size = (unsigned long)_secondary_start_end |
| 62 | - (unsigned long)_secondary_start; |
Yinghai Lu | 72ee9b0 | 2005-12-14 02:39:33 +0000 | [diff] [blame] | 63 | |
Kyösti Mälkki | a16cd9c | 2016-06-16 00:40:16 +0300 | [diff] [blame] | 64 | if (acpi_is_wakeup_s3()) { |
| 65 | /* need to save it for RAM resume */ |
| 66 | lowmem_backup_size = code_size; |
| 67 | lowmem_backup = malloc(code_size); |
| 68 | lowmem_backup_ptr = (char *)AP_SIPI_VECTOR; |
Zheng Bao | d4c5c44 | 2010-02-20 09:38:16 +0000 | [diff] [blame] | 69 | |
Kyösti Mälkki | a16cd9c | 2016-06-16 00:40:16 +0300 | [diff] [blame] | 70 | if (lowmem_backup == NULL) |
| 71 | die("Out of backup memory\n"); |
Rudolf Marek | a572f83 | 2009-04-13 17:57:44 +0000 | [diff] [blame] | 72 | |
Kyösti Mälkki | a16cd9c | 2016-06-16 00:40:16 +0300 | [diff] [blame] | 73 | memcpy(lowmem_backup, lowmem_backup_ptr, lowmem_backup_size); |
| 74 | } |
| 75 | |
Elyes HAOUAS | 585d1a0 | 2016-07-28 19:15:34 +0200 | [diff] [blame] | 76 | /* copy the _secondary_start to the RAM below 1M*/ |
Lee Leahy | c591707 | 2017-03-15 16:38:51 -0700 | [diff] [blame] | 77 | memcpy((unsigned char *)AP_SIPI_VECTOR, |
| 78 | (unsigned char *)_secondary_start, code_size); |
Yinghai Lu | 72ee9b0 | 2005-12-14 02:39:33 +0000 | [diff] [blame] | 79 | |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 80 | printk(BIOS_DEBUG, "start_eip=0x%08lx, code_size=0x%08lx\n", |
Lee Leahy | dfc8a560 | 2017-03-15 16:47:33 -0700 | [diff] [blame] | 81 | (unsigned long int)AP_SIPI_VECTOR, code_size); |
Yinghai Lu | 72ee9b0 | 2005-12-14 02:39:33 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Kyösti Mälkki | a16cd9c | 2016-06-16 00:40:16 +0300 | [diff] [blame] | 84 | static void recover_lowest_1M(void) |
| 85 | { |
| 86 | if (acpi_is_wakeup_s3()) |
| 87 | memcpy(lowmem_backup_ptr, lowmem_backup, lowmem_backup_size); |
| 88 | } |
| 89 | |
Kyösti Mälkki | 68fe11b | 2021-05-30 10:17:52 +0300 | [diff] [blame] | 90 | static uint32_t wait_for_ipi_completion(const int timeout_ms) |
| 91 | { |
| 92 | int loops = timeout_ms * 10; |
| 93 | uint32_t send_status; |
| 94 | |
| 95 | /* wait for the ipi send to finish */ |
| 96 | printk(BIOS_SPEW, "Waiting for send to finish...\n"); |
| 97 | do { |
| 98 | printk(BIOS_SPEW, "+"); |
| 99 | udelay(100); |
| 100 | send_status = lapic_busy(); |
| 101 | } while (send_status && (--loops > 0)); |
| 102 | |
| 103 | return send_status; |
| 104 | } |
| 105 | |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 106 | static int lapic_start_cpu(unsigned long apicid) |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 107 | { |
Kyösti Mälkki | 68fe11b | 2021-05-30 10:17:52 +0300 | [diff] [blame] | 108 | const int timeout_100ms = 100; |
Patrick Rudolph | fc57d6c | 2019-11-12 16:30:14 +0100 | [diff] [blame] | 109 | uint32_t send_status, accept_status; |
Ronald G. Minnich | b5e777c | 2013-07-22 20:17:18 +0200 | [diff] [blame] | 110 | int j, maxlvt; |
Zheng Bao | d4c5c44 | 2010-02-20 09:38:16 +0000 | [diff] [blame] | 111 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 112 | /* |
| 113 | * Starting actual IPI sequence... |
| 114 | */ |
| 115 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 116 | printk(BIOS_SPEW, "Asserting INIT.\n"); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 117 | |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 118 | /* |
| 119 | * Turn INIT on target chip |
| 120 | */ |
Arthur Heymans | 6f77ff7 | 2021-05-21 09:32:45 +0200 | [diff] [blame] | 121 | lapic_send_ipi(LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT | LAPIC_DM_INIT, apicid); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 122 | |
Kyösti Mälkki | 68fe11b | 2021-05-30 10:17:52 +0300 | [diff] [blame] | 123 | send_status = wait_for_ipi_completion(timeout_100ms); |
| 124 | if (send_status) { |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 125 | printk(BIOS_ERR, "CPU %ld: First APIC write timed out. " |
| 126 | "Disabling\n", apicid); |
Zheng Bao | d4c5c44 | 2010-02-20 09:38:16 +0000 | [diff] [blame] | 127 | // too bad. |
Patrick Rudolph | fc57d6c | 2019-11-12 16:30:14 +0100 | [diff] [blame] | 128 | printk(BIOS_ERR, "ESR is 0x%x\n", lapic_read(LAPIC_ESR)); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 129 | if (lapic_read(LAPIC_ESR)) { |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 130 | printk(BIOS_ERR, "Try to reset ESR\n"); |
Kyösti Mälkki | b31b033 | 2021-05-31 14:41:15 +0300 | [diff] [blame] | 131 | lapic_write(LAPIC_ESR, 0); |
Patrick Rudolph | fc57d6c | 2019-11-12 16:30:14 +0100 | [diff] [blame] | 132 | printk(BIOS_ERR, "ESR is 0x%x\n", |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 133 | lapic_read(LAPIC_ESR)); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 134 | } |
| 135 | return 0; |
| 136 | } |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 137 | mdelay(10); |
Yinghai Lu | 9a791df | 2006-04-03 20:38:34 +0000 | [diff] [blame] | 138 | |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 139 | printk(BIOS_SPEW, "Deasserting INIT.\n"); |
Sven Schnelle | 042c146 | 2012-06-17 10:32:55 +0200 | [diff] [blame] | 140 | |
Arthur Heymans | 6f77ff7 | 2021-05-21 09:32:45 +0200 | [diff] [blame] | 141 | lapic_send_ipi(LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT, apicid); |
Sven Schnelle | 042c146 | 2012-06-17 10:32:55 +0200 | [diff] [blame] | 142 | |
Kyösti Mälkki | 68fe11b | 2021-05-30 10:17:52 +0300 | [diff] [blame] | 143 | send_status = wait_for_ipi_completion(timeout_100ms); |
| 144 | if (send_status) { |
Elyes HAOUAS | d6e9686 | 2016-08-21 10:12:15 +0200 | [diff] [blame] | 145 | printk(BIOS_ERR, "CPU %ld: Second APIC write timed out. " |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 146 | "Disabling\n", apicid); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 147 | // too bad. |
| 148 | return 0; |
| 149 | } |
| 150 | |
Sven Schnelle | 042c146 | 2012-06-17 10:32:55 +0200 | [diff] [blame] | 151 | /* |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 152 | * Run STARTUP IPI loop. |
Sven Schnelle | 042c146 | 2012-06-17 10:32:55 +0200 | [diff] [blame] | 153 | */ |
Ronald G. Minnich | b5e777c | 2013-07-22 20:17:18 +0200 | [diff] [blame] | 154 | printk(BIOS_SPEW, "#startup loops: %d.\n", CONFIG_NUM_IPI_STARTS); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 155 | |
| 156 | maxlvt = 4; |
| 157 | |
Ronald G. Minnich | b5e777c | 2013-07-22 20:17:18 +0200 | [diff] [blame] | 158 | for (j = 1; j <= CONFIG_NUM_IPI_STARTS; j++) { |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 159 | printk(BIOS_SPEW, "Sending STARTUP #%d to %lu.\n", j, apicid); |
Kyösti Mälkki | 08f4526 | 2021-05-31 10:53:18 +0300 | [diff] [blame] | 160 | lapic_read(LAPIC_SPIV); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 161 | lapic_write(LAPIC_ESR, 0); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 162 | lapic_read(LAPIC_ESR); |
| 163 | printk(BIOS_SPEW, "After apic_write.\n"); |
Sven Schnelle | 042c146 | 2012-06-17 10:32:55 +0200 | [diff] [blame] | 164 | |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 165 | /* |
| 166 | * STARTUP IPI |
| 167 | */ |
| 168 | |
Arthur Heymans | 6f77ff7 | 2021-05-21 09:32:45 +0200 | [diff] [blame] | 169 | lapic_send_ipi(LAPIC_DM_STARTUP | (AP_SIPI_VECTOR >> 12), apicid); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 170 | |
| 171 | /* |
| 172 | * Give the other CPU some time to accept the IPI. |
| 173 | */ |
| 174 | udelay(300); |
| 175 | |
| 176 | printk(BIOS_SPEW, "Startup point 1.\n"); |
| 177 | |
Kyösti Mälkki | 68fe11b | 2021-05-30 10:17:52 +0300 | [diff] [blame] | 178 | send_status = wait_for_ipi_completion(timeout_100ms); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 179 | |
| 180 | /* |
| 181 | * Give the other CPU some time to accept the IPI. |
| 182 | */ |
| 183 | udelay(200); |
| 184 | /* |
| 185 | * Due to the Pentium erratum 3AP. |
| 186 | */ |
| 187 | if (maxlvt > 3) { |
Kyösti Mälkki | 08f4526 | 2021-05-31 10:53:18 +0300 | [diff] [blame] | 188 | lapic_read(LAPIC_SPIV); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 189 | lapic_write(LAPIC_ESR, 0); |
| 190 | } |
| 191 | accept_status = (lapic_read(LAPIC_ESR) & 0xEF); |
| 192 | if (send_status || accept_status) |
| 193 | break; |
| 194 | } |
| 195 | printk(BIOS_SPEW, "After Startup.\n"); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 196 | if (send_status) |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 197 | printk(BIOS_WARNING, "APIC never delivered???\n"); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 198 | if (accept_status) |
Patrick Rudolph | fc57d6c | 2019-11-12 16:30:14 +0100 | [diff] [blame] | 199 | printk(BIOS_WARNING, "APIC delivery error (%x).\n", |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 200 | accept_status); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 201 | if (send_status || accept_status) |
| 202 | return 0; |
| 203 | return 1; |
| 204 | } |
| 205 | |
Stefan Reinauer | f8ee180 | 2008-01-18 15:08:58 +0000 | [diff] [blame] | 206 | /* Number of cpus that are currently running in coreboot */ |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 207 | static atomic_t active_cpus = ATOMIC_INIT(1); |
| 208 | |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 209 | /* start_cpu_lock covers last_cpu_index and secondary_stack. |
Elyes HAOUAS | d82be92 | 2016-07-28 18:58:27 +0200 | [diff] [blame] | 210 | * Only starting one CPU at a time let's me remove the logic |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 211 | * for select the stack from assembly language. |
| 212 | * |
Elyes HAOUAS | d82be92 | 2016-07-28 18:58:27 +0200 | [diff] [blame] | 213 | * In addition communicating by variables to the CPU I |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 214 | * am starting allows me to verify it has started before |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 215 | * start_cpu returns. |
| 216 | */ |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 217 | |
Kyösti Mälkki | 0cc2ce4 | 2017-08-18 11:46:32 +0300 | [diff] [blame] | 218 | DECLARE_SPIN_LOCK(start_cpu_lock); |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 219 | static unsigned int last_cpu_index = 0; |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 220 | static void *stacks[CONFIG_MAX_CPUS]; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 221 | volatile unsigned long secondary_stack; |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 222 | volatile unsigned int secondary_cpu_index; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 223 | |
Kyösti Mälkki | 67d07a6 | 2021-05-29 21:10:51 +0300 | [diff] [blame] | 224 | static int start_cpu(struct device *cpu) |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 225 | { |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 226 | struct cpu_info *info; |
Kyösti Mälkki | 2fbb677 | 2018-05-15 19:50:20 +0300 | [diff] [blame] | 227 | uintptr_t stack_top; |
| 228 | uintptr_t stack_base; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 229 | unsigned long apicid; |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 230 | unsigned int index; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 231 | unsigned long count; |
| 232 | int result; |
| 233 | |
| 234 | spin_lock(&start_cpu_lock); |
| 235 | |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 236 | /* Get the CPU's apicid */ |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 237 | apicid = cpu->path.apic.apic_id; |
| 238 | |
| 239 | /* Get an index for the new processor */ |
| 240 | index = ++last_cpu_index; |
| 241 | |
Kyösti Mälkki | 2fbb677 | 2018-05-15 19:50:20 +0300 | [diff] [blame] | 242 | /* Find boundaries of the new processor's stack */ |
| 243 | stack_top = ALIGN_DOWN((uintptr_t)_estack, CONFIG_STACK_SIZE); |
| 244 | stack_top -= (CONFIG_STACK_SIZE*index); |
| 245 | stack_base = stack_top - CONFIG_STACK_SIZE; |
| 246 | stack_top -= sizeof(struct cpu_info); |
| 247 | printk(BIOS_SPEW, "CPU%d: stack_base %p, stack_top %p\n", index, |
| 248 | (void *)stack_base, (void *)stack_top); |
Kyösti Mälkki | a706ad5 | 2018-05-23 01:13:27 +0300 | [diff] [blame] | 249 | stacks[index] = (void *)stack_base; |
| 250 | |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 251 | /* Record the index and which CPU structure we are using */ |
Kyösti Mälkki | 2fbb677 | 2018-05-15 19:50:20 +0300 | [diff] [blame] | 252 | info = (struct cpu_info *)stack_top; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 253 | info->index = index; |
| 254 | info->cpu = cpu; |
Subrata Banik | e091d0e | 2019-05-10 12:35:42 +0530 | [diff] [blame] | 255 | cpu_add_map_entry(info->index); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 256 | |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 257 | /* Advertise the new stack and index to start_cpu */ |
Kyösti Mälkki | 2fbb677 | 2018-05-15 19:50:20 +0300 | [diff] [blame] | 258 | secondary_stack = stack_top; |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 259 | secondary_cpu_index = index; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 260 | |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 261 | /* Until the CPU starts up report the CPU is not enabled */ |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 262 | cpu->enabled = 0; |
| 263 | cpu->initialized = 0; |
| 264 | |
Elyes HAOUAS | d82be92 | 2016-07-28 18:58:27 +0200 | [diff] [blame] | 265 | /* Start the CPU */ |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 266 | result = lapic_start_cpu(apicid); |
| 267 | |
| 268 | if (result) { |
| 269 | result = 0; |
Elyes HAOUAS | d82be92 | 2016-07-28 18:58:27 +0200 | [diff] [blame] | 270 | /* Wait 1s or until the new CPU calls in */ |
Elyes HAOUAS | 90ba189 | 2016-10-02 10:23:01 +0200 | [diff] [blame] | 271 | for (count = 0; count < 100000; count++) { |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 272 | if (secondary_stack == 0) { |
| 273 | result = 1; |
| 274 | break; |
| 275 | } |
| 276 | udelay(10); |
Jonathan A. Kollasch | 98fc2e9 | 2015-07-15 11:27:18 -0500 | [diff] [blame] | 277 | } |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 278 | } |
| 279 | secondary_stack = 0; |
| 280 | spin_unlock(&start_cpu_lock); |
| 281 | return result; |
| 282 | } |
| 283 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 284 | /* C entry point of secondary cpus */ |
Lee Leahy | dfc8a560 | 2017-03-15 16:47:33 -0700 | [diff] [blame] | 285 | asmlinkage void secondary_cpu_init(unsigned int index) |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 286 | { |
Sven Schnelle | 042c146 | 2012-06-17 10:32:55 +0200 | [diff] [blame] | 287 | atomic_inc(&active_cpus); |
Kyösti Mälkki | 5c3f384 | 2014-05-08 15:27:15 +0300 | [diff] [blame] | 288 | |
Kyösti Mälkki | 176989a | 2021-05-29 22:22:57 +0300 | [diff] [blame] | 289 | spin_lock(&start_cpu_lock); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 290 | |
| 291 | #ifdef __SSE3__ |
| 292 | /* |
| 293 | * Seems that CR4 was cleared when AP start via lapic_start_cpu() |
| 294 | * Turn on CR4.OSFXSR and CR4.OSXMMEXCPT when SSE options enabled |
| 295 | */ |
Elyes HAOUAS | 63f98f2 | 2019-06-26 20:17:50 +0200 | [diff] [blame] | 296 | CRx_TYPE cr4_val; |
Aaron Durbin | 029aaf6 | 2013-10-10 12:41:49 -0500 | [diff] [blame] | 297 | cr4_val = read_cr4(); |
| 298 | cr4_val |= (CR4_OSFXSR | CR4_OSXMMEXCPT); |
| 299 | write_cr4(cr4_val); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 300 | #endif |
Kyösti Mälkki | 9ec7227 | 2021-10-17 08:34:31 +0300 | [diff] [blame] | 301 | |
| 302 | /* Ensure the local APIC is enabled */ |
| 303 | enable_lapic(); |
| 304 | setup_lapic_interrupts(); |
| 305 | |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 306 | cpu_initialize(index); |
Kyösti Mälkki | 5c3f384 | 2014-05-08 15:27:15 +0300 | [diff] [blame] | 307 | |
Kyösti Mälkki | 176989a | 2021-05-29 22:22:57 +0300 | [diff] [blame] | 308 | spin_unlock(&start_cpu_lock); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 309 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 310 | atomic_dec(&active_cpus); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 311 | |
| 312 | stop_this_cpu(); |
| 313 | } |
| 314 | |
Edward O'Callaghan | 2c9d2cf | 2014-10-27 23:29:29 +1100 | [diff] [blame] | 315 | static void start_other_cpus(struct bus *cpu_bus, struct device *bsp_cpu) |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 316 | { |
Edward O'Callaghan | 2c9d2cf | 2014-10-27 23:29:29 +1100 | [diff] [blame] | 317 | struct device *cpu; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 318 | /* Loop through the cpus once getting them started */ |
| 319 | |
Elyes HAOUAS | 90ba189 | 2016-10-02 10:23:01 +0200 | [diff] [blame] | 320 | for (cpu = cpu_bus->children; cpu; cpu = cpu->sibling) { |
Lee Leahy | a15d8af | 2017-03-15 14:49:35 -0700 | [diff] [blame] | 321 | if (cpu->path.type != DEVICE_PATH_APIC) |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 322 | continue; |
Kyösti Mälkki | 5c3f384 | 2014-05-08 15:27:15 +0300 | [diff] [blame] | 323 | |
Lee Leahy | a15d8af | 2017-03-15 14:49:35 -0700 | [diff] [blame] | 324 | if (!cpu->enabled) |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 325 | continue; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 326 | |
Lee Leahy | a15d8af | 2017-03-15 14:49:35 -0700 | [diff] [blame] | 327 | if (cpu->initialized) |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 328 | continue; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 329 | |
Lee Leahy | a15d8af | 2017-03-15 14:49:35 -0700 | [diff] [blame] | 330 | if (!start_cpu(cpu)) |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 331 | /* Record the error in cpu? */ |
| 332 | printk(BIOS_ERR, "CPU 0x%02x would not start!\n", |
| 333 | cpu->path.apic.apic_id); |
Kyösti Mälkki | 5c3f384 | 2014-05-08 15:27:15 +0300 | [diff] [blame] | 334 | |
Kyösti Mälkki | 176989a | 2021-05-29 22:22:57 +0300 | [diff] [blame] | 335 | udelay(10); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 336 | } |
Yinghai Lu | 9a8e36d | 2006-05-18 17:02:17 +0000 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | static void wait_other_cpus_stop(struct bus *cpu_bus) |
| 340 | { |
Edward O'Callaghan | 2c9d2cf | 2014-10-27 23:29:29 +1100 | [diff] [blame] | 341 | struct device *cpu; |
Yinghai Lu | 9a8e36d | 2006-05-18 17:02:17 +0000 | [diff] [blame] | 342 | int old_active_count, active_count; |
Stefan Reinauer | 2bdfb48 | 2012-04-03 16:17:11 -0700 | [diff] [blame] | 343 | long loopcount = 0; |
Ronald G. Minnich | 000bf83c | 2012-06-06 13:00:24 -0700 | [diff] [blame] | 344 | int i; |
Stefan Reinauer | 2bdfb48 | 2012-04-03 16:17:11 -0700 | [diff] [blame] | 345 | |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 346 | /* Now loop until the other cpus have finished initializing */ |
| 347 | old_active_count = 1; |
| 348 | active_count = atomic_read(&active_cpus); |
Elyes HAOUAS | cbe7464c | 2016-08-23 21:07:28 +0200 | [diff] [blame] | 349 | while (active_count > 1) { |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 350 | if (active_count != old_active_count) { |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 351 | printk(BIOS_INFO, "Waiting for %d CPUS to stop\n", |
| 352 | active_count - 1); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 353 | old_active_count = active_count; |
| 354 | } |
| 355 | udelay(10); |
| 356 | active_count = atomic_read(&active_cpus); |
Stefan Reinauer | 2bdfb48 | 2012-04-03 16:17:11 -0700 | [diff] [blame] | 357 | loopcount++; |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 358 | } |
Elyes HAOUAS | cbe7464c | 2016-08-23 21:07:28 +0200 | [diff] [blame] | 359 | for (cpu = cpu_bus->children; cpu; cpu = cpu->sibling) { |
Lee Leahy | a15d8af | 2017-03-15 14:49:35 -0700 | [diff] [blame] | 360 | if (cpu->path.type != DEVICE_PATH_APIC) |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 361 | continue; |
Lee Leahy | a15d8af | 2017-03-15 14:49:35 -0700 | [diff] [blame] | 362 | if (cpu->path.apic.apic_id == SPEEDSTEP_APIC_MAGIC) |
Stefan Reinauer | 2bdfb48 | 2012-04-03 16:17:11 -0700 | [diff] [blame] | 363 | continue; |
Lee Leahy | a15d8af | 2017-03-15 14:49:35 -0700 | [diff] [blame] | 364 | if (!cpu->initialized) |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 365 | printk(BIOS_ERR, "CPU 0x%02x did not initialize!\n", |
Stefan Reinauer | 2b34db8 | 2009-02-28 20:10:20 +0000 | [diff] [blame] | 366 | cpu->path.apic.apic_id); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 367 | } |
Stefan Reinauer | 2bdfb48 | 2012-04-03 16:17:11 -0700 | [diff] [blame] | 368 | printk(BIOS_DEBUG, "All AP CPUs stopped (%ld loops)\n", loopcount); |
Timothy Pearson | 6b6c653 | 2015-09-05 19:31:20 -0500 | [diff] [blame] | 369 | checkstack(_estack, 0); |
Kyösti Mälkki | 0cc2ce4 | 2017-08-18 11:46:32 +0300 | [diff] [blame] | 370 | for (i = 1; i < CONFIG_MAX_CPUS && i <= last_cpu_index; i++) |
Stefan Reinauer | 75dbc38 | 2012-10-15 15:19:43 -0700 | [diff] [blame] | 371 | checkstack((void *)stacks[i] + CONFIG_STACK_SIZE, i); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 372 | } |
| 373 | |
Eric Biederman | 7003ba4 | 2004-10-16 06:20:29 +0000 | [diff] [blame] | 374 | void initialize_cpus(struct bus *cpu_bus) |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 375 | { |
| 376 | struct device_path cpu_path; |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 377 | struct cpu_info *info; |
| 378 | |
Elyes HAOUAS | d82be92 | 2016-07-28 18:58:27 +0200 | [diff] [blame] | 379 | /* Find the info struct for this CPU */ |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 380 | info = cpu_info(); |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 381 | |
Kyösti Mälkki | 4cf65e9 | 2021-06-06 12:03:27 +0300 | [diff] [blame] | 382 | /* Ensure the local APIC is enabled */ |
Kyösti Mälkki | 9ec7227 | 2021-10-17 08:34:31 +0300 | [diff] [blame] | 383 | if (is_smp_boot()) { |
Kyösti Mälkki | ff284f6 | 2017-08-18 12:11:16 +0300 | [diff] [blame] | 384 | enable_lapic(); |
Kyösti Mälkki | 9ec7227 | 2021-10-17 08:34:31 +0300 | [diff] [blame] | 385 | setup_lapic_interrupts(); |
Kyösti Mälkki | 707e545 | 2022-02-10 07:13:29 +0200 | [diff] [blame] | 386 | } else { |
| 387 | disable_lapic(); |
Kyösti Mälkki | 9ec7227 | 2021-10-17 08:34:31 +0300 | [diff] [blame] | 388 | } |
Eric Biederman | fcd5ace | 2004-10-14 19:29:29 +0000 | [diff] [blame] | 389 | |
Kyösti Mälkki | 4cf65e9 | 2021-06-06 12:03:27 +0300 | [diff] [blame] | 390 | /* Get the device path of the boot CPU */ |
| 391 | cpu_path.type = DEVICE_PATH_APIC; |
| 392 | cpu_path.apic.apic_id = lapicid(); |
Stefan Reinauer | 00a889c | 2008-10-29 04:48:44 +0000 | [diff] [blame] | 393 | |
Elyes HAOUAS | d82be92 | 2016-07-28 18:58:27 +0200 | [diff] [blame] | 394 | /* Find the device structure for the boot CPU */ |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 395 | info->cpu = alloc_find_dev(cpu_bus, &cpu_path); |
Subrata Banik | e091d0e | 2019-05-10 12:35:42 +0530 | [diff] [blame] | 396 | cpu_add_map_entry(info->index); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 397 | |
Stefan Reinauer | 1bfbbc0 | 2012-06-07 14:00:07 -0700 | [diff] [blame] | 398 | // why here? In case some day we can start core1 in amd_sibling_init |
Kyösti Mälkki | 0cc2ce4 | 2017-08-18 11:46:32 +0300 | [diff] [blame] | 399 | if (is_smp_boot()) |
| 400 | copy_secondary_start_to_lowest_1M(); |
Stefan Reinauer | 00a889c | 2008-10-29 04:48:44 +0000 | [diff] [blame] | 401 | |
Kyösti Mälkki | 894f6f8 | 2022-01-29 14:05:58 +0200 | [diff] [blame] | 402 | if (CONFIG(SMM_LEGACY_ASEG)) |
| 403 | smm_init(); |
Stefan Reinauer | 00a889c | 2008-10-29 04:48:44 +0000 | [diff] [blame] | 404 | |
Zheng Bao | d4c5c44 | 2010-02-20 09:38:16 +0000 | [diff] [blame] | 405 | /* Initialize the bootstrap processor */ |
Ronald G. Minnich | 8b93059 | 2012-06-05 14:41:27 -0700 | [diff] [blame] | 406 | cpu_initialize(0); |
Yinghai Lu | 9a8e36d | 2006-05-18 17:02:17 +0000 | [diff] [blame] | 407 | |
Kyösti Mälkki | 176989a | 2021-05-29 22:22:57 +0300 | [diff] [blame] | 408 | if (is_smp_boot()) |
Kyösti Mälkki | 5c3f384 | 2014-05-08 15:27:15 +0300 | [diff] [blame] | 409 | start_other_cpus(cpu_bus, info->cpu); |
Sven Schnelle | 51676b1 | 2012-07-29 19:18:03 +0200 | [diff] [blame] | 410 | |
Kyösti Mälkki | fdca655 | 2018-04-26 20:09:54 +0300 | [diff] [blame] | 411 | /* Now wait the rest of the cpus stop*/ |
| 412 | if (is_smp_boot()) |
Kyösti Mälkki | 0cc2ce4 | 2017-08-18 11:46:32 +0300 | [diff] [blame] | 413 | wait_other_cpus_stop(cpu_bus); |
Damien Zammit | 149c4c5 | 2015-11-28 21:27:05 +1100 | [diff] [blame] | 414 | |
Kyösti Mälkki | 894f6f8 | 2022-01-29 14:05:58 +0200 | [diff] [blame] | 415 | if (CONFIG(SMM_LEGACY_ASEG)) |
| 416 | smm_init_completion(); |
Kyösti Mälkki | 2e50142 | 2017-04-21 08:43:09 +0300 | [diff] [blame] | 417 | |
Kyösti Mälkki | 0cc2ce4 | 2017-08-18 11:46:32 +0300 | [diff] [blame] | 418 | if (is_smp_boot()) |
| 419 | recover_lowest_1M(); |
| 420 | } |