Angel Pons | 6bc1374 | 2020-04-05 15:46:38 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Usha P | aaf28d2 | 2020-02-17 15:14:18 +0530 | [diff] [blame] | 3 | |
| 4 | #include <arch/cpu.h> |
| 5 | #include <device/pci_ops.h> |
| 6 | #include <console/console.h> |
| 7 | #include <cpu/x86/msr.h> |
| 8 | #include <cpu/x86/name.h> |
| 9 | #include <device/pci.h> |
| 10 | #include <device/pci_ids.h> |
| 11 | #include <intelblocks/mp_init.h> |
| 12 | #include <soc/romstage.h> |
| 13 | #include <soc/pci_devs.h> |
| 14 | |
| 15 | static struct { |
| 16 | u32 cpuid; |
| 17 | const char *name; |
| 18 | } cpu_table[] = { |
| 19 | { CPUID_APOLLOLAKE_A0, "Apollolake A0" }, |
| 20 | { CPUID_APOLLOLAKE_B0, "Apollolake B0" }, |
| 21 | { CPUID_APOLLOLAKE_E0, "Apollolake E0" }, |
| 22 | { CPUID_GLK_A0, "Geminilake A0" }, |
| 23 | { CPUID_GLK_B0, "Geminilake B0" }, |
| 24 | { CPUID_GLK_R0, "Geminilake R0" }, |
| 25 | }; |
| 26 | |
| 27 | static struct { |
| 28 | u16 mchid; |
| 29 | const char *name; |
| 30 | } mch_table[] = { |
| 31 | { PCI_DEVICE_ID_INTEL_GLK_NB, "Geminilake" }, |
| 32 | { PCI_DEVICE_ID_INTEL_APL_NB, "Apollolake" }, |
| 33 | }; |
| 34 | |
| 35 | static struct { |
| 36 | u16 lpcid; |
| 37 | const char *name; |
| 38 | } pch_table[] = { |
| 39 | { PCI_DEVICE_ID_INTEL_APL_LPC, "Apollolake" }, |
| 40 | { PCI_DEVICE_ID_INTEL_GLK_LPC, "Geminilake" }, |
| 41 | { PCI_DEVICE_ID_INTEL_GLK_ESPI, "Geminilake" }, |
| 42 | }; |
| 43 | |
| 44 | static struct { |
| 45 | u16 igdid; |
| 46 | const char *name; |
| 47 | } igd_table[] = { |
| 48 | { PCI_DEVICE_ID_INTEL_APL_IGD_HD_505, "Apollolake HD 505" }, |
| 49 | { PCI_DEVICE_ID_INTEL_APL_IGD_HD_500, "Aplollolake HD 500" }, |
| 50 | { PCI_DEVICE_ID_INTEL_GLK_IGD, "Geminilake" }, |
| 51 | { PCI_DEVICE_ID_INTEL_GLK_IGD_EU12, "Geminilake EU12" }, |
| 52 | }; |
| 53 | |
| 54 | static uint8_t get_dev_revision(pci_devfn_t dev) |
| 55 | { |
| 56 | return pci_read_config8(dev, PCI_REVISION_ID); |
| 57 | } |
| 58 | |
| 59 | static uint16_t get_dev_id(pci_devfn_t dev) |
| 60 | { |
| 61 | return pci_read_config16(dev, PCI_DEVICE_ID); |
| 62 | } |
| 63 | |
| 64 | static void report_cpu_info(void) |
| 65 | { |
| 66 | uint32_t i, cpu_id, cpu_feature_flag; |
| 67 | char cpu_name[49]; |
| 68 | msr_t microcode_ver; |
| 69 | const char *support = "Supported"; |
| 70 | const char *no_support = "Not Supported"; |
| 71 | const char *cpu_type = "Unknown"; |
| 72 | |
| 73 | fill_processor_name(cpu_name); |
| 74 | |
| 75 | microcode_ver.lo = 0; |
| 76 | microcode_ver.hi = 0; |
| 77 | wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); |
| 78 | cpu_id = cpu_get_cpuid(); |
| 79 | microcode_ver = rdmsr(IA32_BIOS_SIGN_ID); |
| 80 | |
| 81 | /* Look for string to match the name */ |
| 82 | for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { |
| 83 | if (cpu_table[i].cpuid == cpu_id) { |
| 84 | cpu_type = cpu_table[i].name; |
| 85 | break; |
| 86 | } |
| 87 | } |
| 88 | |
| 89 | printk(BIOS_INFO, "CPU: %s\n", cpu_name); |
| 90 | printk(BIOS_INFO, "CPU: ID %x, %s, ucode: %08x\n", cpu_id, cpu_type, microcode_ver.hi); |
| 91 | |
| 92 | cpu_feature_flag = cpu_get_feature_flags_ecx(); |
| 93 | printk(BIOS_INFO, "CPU: AES %s, TXT %s, VT %s\n", |
| 94 | (cpu_feature_flag & CPUID_AES) ? support : no_support, |
| 95 | (cpu_feature_flag & CPUID_SMX) ? support : no_support, |
| 96 | (cpu_feature_flag & CPUID_VMX) ? support : no_support); |
| 97 | } |
| 98 | |
| 99 | static void report_mch_info(void) |
| 100 | { |
| 101 | uint32_t i; |
| 102 | pci_devfn_t dev = SA_DEV_ROOT; |
| 103 | uint16_t mchid = get_dev_id(dev); |
| 104 | uint8_t mch_revision = get_dev_revision(dev); |
| 105 | const char *mch_type = "Unknown"; |
| 106 | |
| 107 | for (i = 0; i < ARRAY_SIZE(mch_table); i++) { |
| 108 | if (mch_table[i].mchid == mchid) { |
| 109 | mch_type = mch_table[i].name; |
| 110 | break; |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | printk(BIOS_INFO, "MCH: device id %04x (rev %02x) is %s\n", |
| 115 | mchid, mch_revision, mch_type); |
| 116 | } |
| 117 | |
| 118 | static void report_pch_info(void) |
| 119 | { |
| 120 | uint32_t i; |
| 121 | pci_devfn_t dev = PCH_DEV_LPC; |
| 122 | uint16_t lpcid = get_dev_id(dev); |
| 123 | const char *pch_type = "Unknown"; |
| 124 | |
| 125 | for (i = 0; i < ARRAY_SIZE(pch_table); i++) { |
| 126 | if (pch_table[i].lpcid == lpcid) { |
| 127 | pch_type = pch_table[i].name; |
| 128 | break; |
| 129 | } |
| 130 | } |
| 131 | printk(BIOS_INFO, "PCH: device id %04x (rev %02x) is %s\n", |
| 132 | lpcid, get_dev_revision(dev), pch_type); |
| 133 | } |
| 134 | |
| 135 | static void report_igd_info(void) |
| 136 | { |
| 137 | uint32_t i; |
| 138 | pci_devfn_t dev = SA_DEV_IGD; |
| 139 | uint16_t igdid = get_dev_id(dev); |
| 140 | const char *igd_type = "Unknown"; |
| 141 | |
| 142 | for (i = 0; i < ARRAY_SIZE(igd_table); i++) { |
| 143 | if (igd_table[i].igdid == igdid) { |
| 144 | igd_type = igd_table[i].name; |
| 145 | break; |
| 146 | } |
| 147 | } |
| 148 | printk(BIOS_INFO, "IGD: device id %04x (rev %02x) is %s\n", |
| 149 | igdid, get_dev_revision(dev), igd_type); |
| 150 | } |
| 151 | |
| 152 | void report_platform_info(void) |
| 153 | { |
| 154 | report_cpu_info(); |
| 155 | report_mch_info(); |
| 156 | report_pch_info(); |
| 157 | report_igd_info(); |
| 158 | } |