Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 3 | if BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 4 | |
| 5 | config BOARD_SPECIFIC_OPTIONS |
| 6 | def_bool y |
| 7 | select SOC_AMD_COMMON_BLOCK_USE_ESPI |
| 8 | select SOC_AMD_PICASSO |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 9 | select BOARD_ROMSIZE_KB_8192 if BOARD_AMD_MANDOLIN |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 10 | select BOARD_ROMSIZE_KB_16384 if BOARD_AMD_CEREME |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 11 | select AZALIA_PLUGIN_SUPPORT |
| 12 | select HAVE_ACPI_RESUME |
Felix Held | b69549b | 2020-08-14 22:27:26 +0200 | [diff] [blame] | 13 | select DRIVERS_UART_ACPI |
Felix Held | 0dfaf33 | 2020-12-09 16:25:18 +0100 | [diff] [blame] | 14 | select AMD_SOC_CONSOLE_UART if !AMD_LPC_DEBUG_CARD |
Zheng Bao | 6bc0698 | 2023-02-14 13:26:31 +0800 | [diff] [blame^] | 15 | select AMD_FWM_POSITION_420000_DEFAULT if BOARD_AMD_MANDOLIN |
| 16 | select AMD_FWM_POSITION_820000_DEFAULT if BOARD_AMD_CEREME |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 17 | |
| 18 | config FMDFILE |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 19 | default "src/mainboard/amd/mandolin/variants/\$(CONFIG_VARIANT_DIR)/board.fmd" |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 20 | |
| 21 | config AMD_LPC_DEBUG_CARD |
| 22 | bool "Enable LPC-Serial debug card on the debug header" |
| 23 | default n |
Felix Held | e2cb869 | 2020-11-23 23:01:45 +0100 | [diff] [blame] | 24 | select MANDOLIN_LPC |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 25 | select SUPERIO_SMSC_SIO1036 |
| 26 | help |
Felix Held | 88c16f6 | 2020-11-11 23:46:58 +0100 | [diff] [blame] | 27 | AMD's debug card contains an SMSC SIO1036 device which provides an |
| 28 | I/O-mapped UART in the system. This is mutually exclusive with |
Felix Held | 0dfaf33 | 2020-12-09 16:25:18 +0100 | [diff] [blame] | 29 | AMD_SOC_CONSOLE_UART which selects the SoC's integrated memory-mapped |
Felix Held | 88c16f6 | 2020-11-11 23:46:58 +0100 | [diff] [blame] | 30 | UART for coreboot console output. |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 31 | |
Nikolai Vyssotski | 6f32d80 | 2020-11-11 16:23:25 -0600 | [diff] [blame] | 32 | choice |
| 33 | prompt "SMSC/Microchip 1036 SuperIO config address" |
| 34 | depends on SUPERIO_SMSC_SIO1036 |
| 35 | default SMSC_SIO1036_BASE_164E |
| 36 | |
| 37 | config SMSC_SIO1036_BASE_4E |
| 38 | bool "0x4e/0x4d base address" |
| 39 | |
| 40 | config SMSC_SIO1036_BASE_164E |
| 41 | bool "0x164e/0x164d base address" |
| 42 | |
| 43 | endchoice |
| 44 | |
| 45 | config SUPERIO_ADDR_BASE |
| 46 | hex |
Elyes HAOUAS | e2856be | 2021-02-09 14:30:27 +0100 | [diff] [blame] | 47 | default 0x4e if SMSC_SIO1036_BASE_4E |
| 48 | default 0x164e if SMSC_SIO1036_BASE_164E |
Nikolai Vyssotski | 6f32d80 | 2020-11-11 16:23:25 -0600 | [diff] [blame] | 49 | |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 50 | config CBFS_SIZE |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 51 | default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 52 | default 0xfcf000 if BOARD_AMD_CEREME # Maximum size for the Cereme FMAP |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 53 | |
| 54 | config MAINBOARD_DIR |
Patrick Georgi | c4b2f8c | 2020-06-24 15:33:15 +0200 | [diff] [blame] | 55 | default "amd/mandolin" |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 56 | |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 57 | config VARIANT_DIR |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 58 | default "mandolin" if BOARD_AMD_MANDOLIN |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 59 | default "cereme" if BOARD_AMD_CEREME |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 60 | |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 61 | config MAINBOARD_PART_NUMBER |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 62 | default "MANDOLIN" if BOARD_AMD_MANDOLIN |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 63 | default "CEREME" if BOARD_AMD_CEREME |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 64 | |
| 65 | config DEVICETREE |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 66 | default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 67 | |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 68 | config ONBOARD_VGA_IS_PRIMARY |
| 69 | bool |
| 70 | default y |
| 71 | |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 72 | config MANDOLIN_HAVE_MCHP_FW |
| 73 | bool "Have Microchip EC firmware?" |
| 74 | default n |
| 75 | |
| 76 | config MANDOLIN_MCHP_FW_FILE |
| 77 | string |
| 78 | depends on MANDOLIN_HAVE_MCHP_FW |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 79 | default "3rdparty/blobs/mainboard/amd/mandolin/EC_mandolin.bin" if BOARD_AMD_MANDOLIN |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 80 | default "3rdparty/blobs/mainboard/amd/mandolin/EC_cereme.bin" if BOARD_AMD_CEREME |
Felix Held | c0de584 | 2020-11-11 21:38:27 +0100 | [diff] [blame] | 81 | help |
| 82 | The EC firmware blob is usually the first 128kByte of the stock |
| 83 | firmware image. |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 84 | |
| 85 | if !AMD_LPC_DEBUG_CARD |
Martin Roth | 87fafca | 2020-07-23 13:28:30 -0600 | [diff] [blame] | 86 | choice |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 87 | prompt "State of IOMux for LPC/eMMC signals" |
| 88 | default MANDOLIN_IOMUX_USE_EMMC |
| 89 | help |
| 90 | Mandolin is designed to use either LPC or eMMC signals. Use this |
| 91 | selection to determine which are configured for this image. |
| 92 | |
| 93 | config MANDOLIN_IOMUX_USE_LPC |
| 94 | bool "LPC signals" |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 95 | |
| 96 | config MANDOLIN_IOMUX_USE_EMMC |
| 97 | bool "eMMC signals" |
| 98 | |
| 99 | endchoice |
| 100 | endif # !AMD_LPC_DEBUG_CARD |
| 101 | |
Felix Held | e2cb869 | 2020-11-23 23:01:45 +0100 | [diff] [blame] | 102 | config MANDOLIN_LPC |
Felix Held | e6315f7 | 2020-04-04 05:27:05 +0200 | [diff] [blame] | 103 | bool |
| 104 | default y if MANDOLIN_IOMUX_USE_LPC |
| 105 | help |
| 106 | Picasso's LPC bus signals are MUXed with some of the EMMC signals. |
| 107 | Select this option if LPC signals are required. |
| 108 | |
Felix Held | fe1d80c | 2020-06-13 02:10:09 +0200 | [diff] [blame] | 109 | #TODO: remove this hack to not break graphics in combination with SeaBIOS |
| 110 | config VGA_BIOS_DGPU_ID |
| 111 | string |
| 112 | default "1002,15d8" |
| 113 | help |
| 114 | The default VGA BIOS PCI vendor/device ID should be set to the |
| 115 | result of the map_oprom_vendev() function in northbridge.c. |
| 116 | |
| 117 | config VGA_BIOS_DGPU_FILE |
| 118 | string |
Felix Held | c077f4a | 2020-06-24 20:43:22 +0200 | [diff] [blame] | 119 | default "3rdparty/amd_blobs/picasso/PicassoGenericVbios.bin" if BOARD_AMD_MANDOLIN |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 120 | default "3rdparty/amd_blobs/picasso/Raven2GenericVbios.bin" if BOARD_AMD_CEREME |
Felix Held | fe1d80c | 2020-06-13 02:10:09 +0200 | [diff] [blame] | 121 | |
Martin Roth | dd6c733 | 2021-08-09 10:39:27 -0600 | [diff] [blame] | 122 | if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 123 | config EFS_SPI_READ_MODE |
Martin Roth | dd6c733 | 2021-08-09 10:39:27 -0600 | [diff] [blame] | 124 | default 3 # Quad IO (1-1-4) |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 125 | |
| 126 | config EFS_SPI_SPEED |
Martin Roth | dd6c733 | 2021-08-09 10:39:27 -0600 | [diff] [blame] | 127 | default 0 # 66MHz |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 128 | |
| 129 | config EFS_SPI_MICRON_FLAG |
Matt Papageorge | 95c42c3 | 2020-07-08 11:33:48 -0500 | [diff] [blame] | 130 | default 0 |
| 131 | |
Martin Roth | dd6c733 | 2021-08-09 10:39:27 -0600 | [diff] [blame] | 132 | config NORMAL_READ_SPI_SPEED |
| 133 | default 1 # 33MHz |
| 134 | |
| 135 | config ALT_SPI_SPEED |
| 136 | default 1 # 33MHz |
| 137 | |
| 138 | config TPM_SPI_SPEED |
| 139 | default 1 # 33MHz |
| 140 | |
| 141 | endif # !EM100 |
| 142 | |
Felix Held | 407b866 | 2020-06-23 01:14:46 +0200 | [diff] [blame] | 143 | endif # BOARD_AMD_MANDOLIN || BOARD_AMD_CEREME |