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Siyuan Wangaffe85f2013-07-25 15:14:15 +08001/**
2 * @file
3 *
4 * PCIe link ASPM Black List
5 *
6 *
7 *
8 * @xrefitem bom "File Content Label" "Release Content"
9 * @e project: AGESA
10 * @e sub-project: GNB
11 * @e \$Revision: 84150 $ @e \$Date: 2012-12-12 15:46:25 -0600 (Wed, 12 Dec 2012) $
12 *
13 */
14/*
15*****************************************************************************
16*
17 * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
18 * All rights reserved.
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41* ***************************************************************************
42*
43*/
44
45/*----------------------------------------------------------------------------------------
46 * M O D U L E S U S E D
47 *----------------------------------------------------------------------------------------
48 */
49#include "AGESA.h"
50#include "Gnb.h"
51#include "GnbPcie.h"
52#include "GnbCommonLib.h"
53#include "PcieAspmBlackList.h"
54#include "Filecode.h"
55#define FILECODE PROC_GNB_MODULES_GNBPCIEINITLIBV1_PCIEASPMBLACKLIST_FILECODE
56/*----------------------------------------------------------------------------------------
57 * D E F I N I T I O N S A N D M A C R O S
58 *----------------------------------------------------------------------------------------
59 */
60
61
62/*----------------------------------------------------------------------------------------
63 * T Y P E D E F S A N D S T R U C T U R E S
64 *----------------------------------------------------------------------------------------
65 */
66
67/*----------------------------------------------------------------------------------------
68 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
69 *----------------------------------------------------------------------------------------
70 */
71
72
73UINT16 AspmBrDeviceTable[] = {
74 0x1002, 0x9441, (UINT16) ~(AspmL1 | AspmL0s),
75 0x10B5, 0xFFFF, (UINT16) ~(AspmL1 | AspmL0s),
76 0x10DE, 0x0402, (UINT16) ~(AspmL1 | AspmL0s),
77 0x10DE, 0x0193, (UINT16) ~(AspmL1 | AspmL0s),
78 0x10DE, 0x0422, (UINT16) ~(AspmL1 | AspmL0s),
79 0x10DE, 0x0292, (UINT16) ~(AspmL1 | AspmL0s),
80 0x10DE, 0x00F9, (UINT16) ~(AspmL1 | AspmL0s),
81 0x10DE, 0x0141, (UINT16) ~(AspmL1 | AspmL0s),
82 0x10DE, 0x0092, (UINT16) ~(AspmL1 | AspmL0s),
83 0x10DE, 0x01D0, (UINT16) ~(AspmL1 | AspmL0s),
84 0x10DE, 0x01D1, (UINT16) ~(AspmL1 | AspmL0s),
85 0x10DE, 0x01D2, (UINT16) ~(AspmL1 | AspmL0s),
86 0x10DE, 0x01D3, (UINT16) ~(AspmL1 | AspmL0s),
87 0x10DE, 0x01D5, (UINT16) ~(AspmL1 | AspmL0s),
88 0x10DE, 0x01D7, (UINT16) ~(AspmL1 | AspmL0s),
89 0x10DE, 0x01D8, (UINT16) ~(AspmL1 | AspmL0s),
90 0x10DE, 0x01DC, (UINT16) ~(AspmL1 | AspmL0s),
91 0x10DE, 0x01DE, (UINT16) ~(AspmL1 | AspmL0s),
92 0x10DE, 0x01DF, (UINT16) ~(AspmL1 | AspmL0s),
93 0x10DE, 0x016A, (UINT16) ~(AspmL1 | AspmL0s),
94 0x10DE, 0x0392, (UINT16) ~(AspmL1 | AspmL0s),
95 0x168C, 0xFFFF, (UINT16) ~(AspmL0s),
96 0x1B4B, 0x91A3, (UINT16) ~(AspmL0s),
97 0x1B4B, 0x9123, (UINT16) ~(AspmL0s),
98 0x1969, 0x1083, (UINT16) ~(AspmL0s),
99 0x1033, 0x0194, (UINT16) ~(AspmL0s),
100 0x1180, 0xE832, (UINT16) ~(AspmL0s),
101 0x1180, 0xE823, (UINT16) ~(AspmL0s)
102};
103
104UINT16 Aspm168cL0sEnabled[] = {
105 0x002B,
106 0x002C,
107 0x002E,
108 0x002A,
109 0x002D,
110 0x0024,
111 0x001B,
112 0x0030,
113 0x0032
114};
115
116/*----------------------------------------------------------------------------------------*/
117/**
118 * Pcie ASPM Black List
119 *
120 *
121 *
122 * @param[in] LinkAspm PCie ASPM black list
123 * @param[in] StdHeader Standard configuration header
124 * @retval AGESA_STATUS
125 */
126
127AGESA_STATUS
128PcieAspmBlackListFeature (
129 IN PCIe_LINK_ASPM *LinkAspm,
130 IN AMD_CONFIG_PARAMS *StdHeader
131 )
132{
133 UINT32 UpstreamDeviceId;
134 UINT32 DownstreamDeviceId;
135 UINTN i;
136 UINT32 DeviceId;
137 UINT32 VendorId;
138
139 GnbLibPciRead (LinkAspm->UpstreamPort.AddressValue, AccessWidth32, &UpstreamDeviceId, StdHeader);
140 GnbLibPciRead (LinkAspm->DownstreamPort.AddressValue, AccessWidth32, &DownstreamDeviceId, StdHeader);
141 LinkAspm->BlackList = FALSE;
Patrick Georgi6b688f52021-02-12 13:49:11 +0100142 for (i = 0; i < ARRAY_SIZE(AspmBrDeviceTable); i = i + 3) {
Siyuan Wangaffe85f2013-07-25 15:14:15 +0800143 VendorId = AspmBrDeviceTable[i];
144 DeviceId = AspmBrDeviceTable[i + 1];
145 if (VendorId == (UINT16)UpstreamDeviceId || VendorId == (UINT16)DownstreamDeviceId ) {
146 if (DeviceId == 0xFFFF || DeviceId == (UpstreamDeviceId >> 16) || DeviceId == (DownstreamDeviceId >> 16)) {
147 LinkAspm->UpstreamAspm &= AspmBrDeviceTable[i + 2];
148 LinkAspm->DownstreamAspm &= AspmBrDeviceTable[i + 2];
149 LinkAspm->BlackList = TRUE;
150 }
151 }
152 }
153 if ((UINT16)UpstreamDeviceId == 0x168c) {
154 // Atheros (Ignore dev capability enable L1 if requested)
155 LinkAspm->UpstreamAspm = LinkAspm->RequestedAspm & AspmL1;
156 LinkAspm->DownstreamAspm = LinkAspm->UpstreamAspm;
157 GnbLibPciRMW (LinkAspm->UpstreamPort.AddressValue | 0x70C, AccessS3SaveWidth32, 0x0, 0x0F003F01, StdHeader);
158
159 DeviceId = UpstreamDeviceId >> 16;
Patrick Georgi6b688f52021-02-12 13:49:11 +0100160 for (i = 0; i < ARRAY_SIZE(Aspm168cL0sEnabled); i++) {
Siyuan Wangaffe85f2013-07-25 15:14:15 +0800161 if (DeviceId == Aspm168cL0sEnabled[i]) {
162 LinkAspm->UpstreamAspm = LinkAspm->RequestedAspm & AspmL0sL1;
163 LinkAspm->DownstreamAspm = LinkAspm->UpstreamAspm & AspmL1;
164 }
165 }
166
167 }
168 if (UpstreamDeviceId == 0x10831969) {
169 GnbLibPciRMW (LinkAspm->UpstreamPort.AddressValue | 0x12F8, AccessS3SaveWidth32, 0xFFF7F7FF, 0, StdHeader);
170 }
171
172 return AGESA_SUCCESS;
173}