Blame - src/northbridge/amd/amdk8/Kconfig - coreboot

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Uwe Hermann	c70e9fc	2010-02-15 23:10:19 +0000	[diff] [blame]	1	##
				2	## This file is part of the coreboot project.
				3	##
				4	## Copyright (C) 2007-2009 coresystems GmbH
				5	##
				6	## This program is free software; you can redistribute it and/or modify
				7	## it under the terms of the GNU General Public License as published by
				8	## the Free Software Foundation; version 2 of the License.
				9	##
				10	## This program is distributed in the hope that it will be useful,
				11	## but WITHOUT ANY WARRANTY; without even the implied warranty of
				12	## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
				13	## GNU General Public License for more details.
				14	##
				15	## You should have received a copy of the GNU General Public License
				16	## along with this program; if not, write to the Free Software
Paul Menzel	a46a712	2013-02-23 18:37:27 +0100	[diff] [blame]	17	## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Uwe Hermann	c70e9fc	2010-02-15 23:10:19 +0000	[diff] [blame]	18	##
Patrick Georgi	0588d19	2009-08-12 15:00:51 +0000	[diff] [blame]	19
				20	config NORTHBRIDGE_AMD_AMDK8
				21	bool
Jens Rottmann	0d11f2d	2010-08-26 12:46:02 +0000	[diff] [blame]	22	select HAVE_DEBUG_RAM_SETUP
				23	select HAVE_DEBUG_SMBUS
Patrick Georgi	e82618d	2010-10-01 14:50:12 +0000	[diff] [blame]	24	select HAVE_DEBUG_CAR
Uwe Hermann	e405327	2009-10-18 13:47:30 +0000	[diff] [blame]	25	select HYPERTRANSPORT_PLUGIN_SUPPORT
Ronald G. Minnich	fd4519b	2009-08-12 15:56:17 +0000	[diff] [blame]	26
Jonathan Kollasch	e5b7507	2010-10-07 23:02:06 +0000	[diff] [blame]	27	if NORTHBRIDGE_AMD_AMDK8
Ronald G. Minnich	fd4519b	2009-08-12 15:56:17 +0000	[diff] [blame]	28	config AGP_APERTURE_SIZE
				29	hex
				30	default 0x4000000
				31
Myles Watson	20d5c2e	2009-10-01 16:24:58 +0000	[diff] [blame]	32	config K8_HT_FREQ_1G_SUPPORT
				33	bool
				34	default n
Myles Watson	20d5c2e	2009-10-01 16:24:58 +0000	[diff] [blame]	35
Kyösti Mälkki	7bdf85b	2012-07-07 13:42:03 +0300	[diff] [blame]	36	config WAIT_BEFORE_CPUS_INIT
				37	bool
				38	default n
				39
Myles Watson	d73c1b5	2009-10-26 15:14:07 +0000	[diff] [blame]	40	config MEM_TRAIN_SEQ
				41	int
				42	default 0
Myles Watson	d73c1b5	2009-10-26 15:14:07 +0000	[diff] [blame]	43
Florian Zumbiehl	36b53bf	2011-12-10 19:39:49 +0100	[diff] [blame]	44	# Force 2T DRAM timing (vendor BIOS does it even for single DIMM setups and
				45	# single DIMM is indeed unreliable without it).
				46	config K8_FORCE_2T_DRAM_TIMING
				47	bool
				48	default n
				49
Myles Watson	d73c1b5	2009-10-26 15:14:07 +0000	[diff] [blame]	50	config HW_MEM_HOLE_SIZEK
				51	hex
				52	default 0x100000
Myles Watson	d73c1b5	2009-10-26 15:14:07 +0000	[diff] [blame]	53
				54	config HW_MEM_HOLE_SIZE_AUTO_INC
				55	bool
				56	default n
Myles Watson	d73c1b5	2009-10-26 15:14:07 +0000	[diff] [blame]	57
enok71	af90275	2011-09-28 16:55:59 +0200	[diff] [blame]	58	config BOOTBLOCK_NORTHBRIDGE_INIT
				59	string
				60	default "northbridge/amd/amdk8/bootblock.c"
				61
Stefan Reinauer	f8b1923	2010-04-07 00:38:09 +0000	[diff] [blame]	62	config SB_HT_CHAIN_UNITID_OFFSET_ONLY
				63	bool
				64	default n
Jonathan Kollasch	e5b7507	2010-10-07 23:02:06 +0000	[diff] [blame]	65
Patrick Georgi	00e1460	2010-11-05 22:59:49 +0000	[diff] [blame]	66	config QRANK_DIMM_SUPPORT
				67	bool
				68	default n
				69
Patrick Georgi	7bbd7f2	2010-11-07 18:20:51 +0000	[diff] [blame]	70	config K8_ALLOCATE_IO_RANGE
				71	bool
				72	default n
				73
Jonathan Kollasch	e5b7507	2010-10-07 23:02:06 +0000	[diff] [blame]	74	if K8_REV_F_SUPPORT
Stefan Reinauer	f8b1923	2010-04-07 00:38:09 +0000	[diff] [blame]	75
Myles Watson	6ea2115	2010-09-10 18:33:24 +0000	[diff] [blame]	76	config DIMM_DDR2
				77	bool
				78	default n
Myles Watson	6ea2115	2010-09-10 18:33:24 +0000	[diff] [blame]	79
				80	config DIMM_REGISTERED
				81	bool
				82	default n
Myles Watson	6ea2115	2010-09-10 18:33:24 +0000	[diff] [blame]	83
				84	if DIMM_DDR2
				85	if DIMM_REGISTERED
				86	config DIMM_SUPPORT
				87	hex
				88	default 0x0104
				89	endif
				90
				91	if !DIMM_REGISTERED
				92	config DIMM_SUPPORT
				93	hex
				94	default 0x0004
				95	endif
Jonathan Kollasch	e5b7507	2010-10-07 23:02:06 +0000	[diff] [blame]	96	endif #DIMM_DDR2
				97
				98	endif #K8_REV_F_SUPPORT
				99
Josef Kellermann	ed1d116	2011-02-24 14:35:42 +0000	[diff] [blame]	100	config IOMMU
				101	bool
				102	default y
				103
Jonathan Kollasch	e5b7507	2010-10-07 23:02:06 +0000	[diff] [blame]	104	endif #NORTHBRIDGE_AMD_K8