Reka Norman | f2f785d | 2022-05-06 20:22:21 +1000 | [diff] [blame] | 1 | fw_config |
| 2 | field STORAGE 30 31 |
| 3 | option STORAGE_EMMC 0 |
| 4 | option STORAGE_NVME 1 |
| 5 | option STORAGE_UFS 2 |
| 6 | end |
| 7 | end |
| 8 | |
Reka Norman | e7640cc | 2021-12-20 10:24:55 +1100 | [diff] [blame] | 9 | chip soc/intel/alderlake |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 10 | |
| 11 | # GPE configuration |
| 12 | register "pmc_gpe0_dw0" = "GPP_A" |
| 13 | register "pmc_gpe0_dw1" = "GPP_H" |
| 14 | register "pmc_gpe0_dw2" = "GPP_F" |
| 15 | |
| 16 | # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f |
| 17 | register "gen1_dec" = "0x00fc0801" |
| 18 | register "gen2_dec" = "0x000c0201" |
| 19 | # EC memory map range is 0x900-0x9ff |
| 20 | register "gen3_dec" = "0x00fc0901" |
| 21 | |
| 22 | # S0ix enable |
| 23 | register "s0ix_enable" = "1" |
| 24 | |
Vidya Gopalakrishnan | 9ffc9eb | 2022-03-22 18:12:47 +0530 | [diff] [blame] | 25 | # DPTF enable |
| 26 | register "dptf_enable" = "1" |
| 27 | |
Sumeet Pawnikar | 4757053 | 2022-05-25 16:36:57 +0530 | [diff] [blame] | 28 | register "tcc_offset" = "10" # TCC of 90 |
| 29 | |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 30 | # Enable CNVi BT |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 31 | register "cnvi_bt_core" = "true" |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 32 | |
Reka Norman | 5bba93e | 2022-02-16 10:12:36 +1100 | [diff] [blame] | 33 | # eMMC HS400 |
| 34 | register "emmc_enable_hs400_mode" = "1" |
| 35 | |
Usha P | 0a3bbe8 | 2022-05-09 08:36:51 +0530 | [diff] [blame] | 36 | #eMMC DLL tuning parameters |
| 37 | #Adding the intermediate eMMC DLL tuning override values |
| 38 | #TODO SoC implementation with the finalized verified values from EV Team |
| 39 | register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505" |
| 40 | register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909" |
| 41 | register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828" |
| 42 | register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B1D3C" |
| 43 | register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10049" |
| 44 | register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x11515" |
| 45 | |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 46 | register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0 |
| 47 | register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 |
| 48 | register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A0 |
| 49 | register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A1 |
| 50 | register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 51 | |
| 52 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port A0 |
| 53 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port A1 |
| 54 | |
| 55 | register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| 56 | register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| 57 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 58 | register "serial_io_i2c_mode" = "{ |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 59 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 60 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| 61 | [PchSerialIoIndexI2C2] = PchSerialIoPci, |
| 62 | [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| 63 | [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| 64 | [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| 65 | }" |
| 66 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 67 | register "serial_io_gspi_mode" = "{ |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 68 | [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, |
| 69 | [PchSerialIoIndexGSPI1] = PchSerialIoDisabled, |
| 70 | }" |
| 71 | |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 72 | register "serial_io_uart_mode" = "{ |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 73 | [PchSerialIoIndexUART0] = PchSerialIoPci, |
| 74 | [PchSerialIoIndexUART1] = PchSerialIoDisabled, |
| 75 | [PchSerialIoIndexUART2] = PchSerialIoDisabled, |
| 76 | }" |
| 77 | |
| 78 | # HD Audio |
MAULIK V VAGHELA | 215a97e | 2022-03-07 18:39:17 +0530 | [diff] [blame] | 79 | register "pch_hda_dsp_enable" = "1" |
| 80 | register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" |
| 81 | register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" |
| 82 | register "pch_hda_idisp_codec_enable" = "1" |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 83 | |
| 84 | # Intel Common SoC Config |
| 85 | #+-------------------+---------------------------+ |
| 86 | #| Field | Value | |
| 87 | #+-------------------+---------------------------+ |
| 88 | #| I2C0 | TPM. Early init is | |
| 89 | #| | required to set up a BAR | |
| 90 | #| | for TPM communication | |
| 91 | #| I2C1 | Touchscreen | |
| 92 | #| I2C2 | Sub-board(PSensor)/WCAM | |
| 93 | #| I2C3 | Audio | |
| 94 | #| I2C5 | Trackpad | |
| 95 | #+-------------------+---------------------------+ |
| 96 | register "common_soc_config" = "{ |
| 97 | .i2c[0] = { |
| 98 | .early_init = 1, |
| 99 | .speed = I2C_SPEED_FAST, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 100 | .speed_config[0] = { |
Reka Norman | 69c9b01 | 2022-06-03 16:31:09 +1000 | [diff] [blame^] | 101 | .speed = I2C_SPEED_FAST, |
| 102 | .scl_lcnt = 158, |
| 103 | .scl_hcnt = 79, |
| 104 | .sda_hold = 7, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 105 | } |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 106 | }, |
| 107 | .i2c[1] = { |
| 108 | .speed = I2C_SPEED_FAST, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 109 | .speed_config[0] = { |
Reka Norman | 69c9b01 | 2022-06-03 16:31:09 +1000 | [diff] [blame^] | 110 | .speed = I2C_SPEED_FAST, |
| 111 | .scl_lcnt = 158, |
| 112 | .scl_hcnt = 79, |
| 113 | .sda_hold = 7, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 114 | } |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 115 | }, |
| 116 | .i2c[2] = { |
| 117 | .speed = I2C_SPEED_FAST, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 118 | .speed_config[0] = { |
Reka Norman | 69c9b01 | 2022-06-03 16:31:09 +1000 | [diff] [blame^] | 119 | .speed = I2C_SPEED_FAST, |
| 120 | .scl_lcnt = 158, |
| 121 | .scl_hcnt = 79, |
| 122 | .sda_hold = 7, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 123 | } |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 124 | }, |
| 125 | .i2c[3] = { |
| 126 | .speed = I2C_SPEED_FAST, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 127 | .speed_config[0] = { |
Reka Norman | 69c9b01 | 2022-06-03 16:31:09 +1000 | [diff] [blame^] | 128 | .speed = I2C_SPEED_FAST, |
| 129 | .scl_lcnt = 158, |
| 130 | .scl_hcnt = 79, |
| 131 | .sda_hold = 7, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 132 | } |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 133 | }, |
| 134 | .i2c[5] = { |
| 135 | .speed = I2C_SPEED_FAST, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 136 | .speed_config[0] = { |
Reka Norman | 69c9b01 | 2022-06-03 16:31:09 +1000 | [diff] [blame^] | 137 | .speed = I2C_SPEED_FAST, |
| 138 | .scl_lcnt = 158, |
| 139 | .scl_hcnt = 79, |
| 140 | .sda_hold = 7, |
Reka Norman | 46694d8 | 2022-04-08 15:14:35 +1000 | [diff] [blame] | 141 | } |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 142 | }, |
| 143 | }" |
| 144 | |
Reka Norman | e7640cc | 2021-12-20 10:24:55 +1100 | [diff] [blame] | 145 | device domain 0 on |
Kangheui Won | 168c25b | 2022-01-17 17:12:00 +1100 | [diff] [blame] | 146 | device ref igpu on end |
| 147 | device ref dtt on end |
| 148 | device ref tcss_xhci on end |
| 149 | device ref xhci on end |
| 150 | device ref shared_sram on end |
| 151 | device ref cnvi_wifi on |
| 152 | chip drivers/wifi/generic |
| 153 | register "wake" = "GPE0_PME_B0" |
| 154 | device generic 0 on end |
| 155 | end |
| 156 | end |
| 157 | device ref i2c0 on |
| 158 | chip drivers/i2c/tpm |
| 159 | register "hid" = ""GOOG0005"" |
| 160 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)" |
| 161 | device i2c 50 on end |
| 162 | end |
| 163 | end |
| 164 | device ref heci1 on end |
| 165 | device ref emmc on end |
| 166 | device ref pcie_rp7 on |
| 167 | # Enable SD Card PCIE 7 using clk 3 |
| 168 | register "pch_pcie_rp[PCH_RP(7)]" = "{ |
| 169 | .clk_src = 3, |
| 170 | .clk_req = 3, |
| 171 | .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, |
| 172 | }" |
| 173 | chip soc/intel/common/block/pcie/rtd3 |
| 174 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)" |
| 175 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H12)" |
| 176 | register "srcclk_pin" = "3" |
| 177 | device generic 0 on end |
| 178 | end |
| 179 | end #PCIE7 SD card |
| 180 | device ref uart0 on end |
| 181 | device ref pch_espi on |
| 182 | chip ec/google/chromeec |
| 183 | device pnp 0c09.0 on end |
| 184 | end |
| 185 | end |
| 186 | device ref hda on end |
Reka Norman | e7640cc | 2021-12-20 10:24:55 +1100 | [diff] [blame] | 187 | end |
| 188 | end |